• 제목/요약/키워드: Equivalent Circuits

검색결과 290건 처리시간 0.024초

주파수 의존성에 따른 고분자 LED의 유전 분산 거동에 관한 연구 (AC dielectric response of poly(p-phenylenevinylene) light emitting devices)

  • 이철의;김세헌;장재원;김상우
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2000년도 추계학술대회 논문집
    • /
    • pp.149-152
    • /
    • 2000
  • AC impedance measurements on poly-p-phenylenevinylene (PPV) LEDs in the frequency range between 10 Hz and 10$\^$6/ Hz were carried out. The complex-plane impedance spectra indicate that PPV devices can be represented by equivalent circuits that corresponds to the bulk and interfacial regions at high and low frequencies, respectively. As a result of complex impedance analysis through the separation of bulk and interfacial region impedances, increase of forward bias in Al/PPV/ITO devices gave rise to relative decrease of the interfacial region impedance. Above the electric field of 10$\^$6/ V/cm the PPV device showed a space charge limited current (SCLC) conduction. The dependence of the transport mechanism and dielectric properties on the applied bias voltage is discussed.

  • PDF

3상 전력변환 시스템을 위한 다변수 상태궤환 제어 (Multivariable State Feedback Control for Three-Phase Power Conversion systems)

  • 이동춘;이지명
    • 전력전자학회논문지
    • /
    • 제2권1호
    • /
    • pp.1-11
    • /
    • 1997
  • 본 논문은 전력변환 시스템의 제어 특성 개선을 위해 전향제어를 갖는 다변수 상태궤환제어를 제시하였다. 이론의 적용대상은 3상 전압형 PWM 컨버터 및 인버터 그리고 3상 전류형 PWM 컨버터 및 인버터 시스템이며, 이들의 등가회로 및 모델링이 유도되고 해석되었다. 다양한 시뮬레이션에 의해 제시된 방법의 타당성을 검증하였다.

  • PDF

상분리법에 의한 유도전동기의 토오크 과도특성해석 (Analysis of the torque transient performance of the induction motor by means of phase segregation method)

  • 정종호;이은웅;최재영
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2000년도 추계학술대회 논문집 학회본부 B
    • /
    • pp.247-249
    • /
    • 2000
  • Transient phenomena cause delay in control response and must be studied and eliminated, if possible, suppressed. The difficulty in analyzing transient phenomena in ac machines comes from the large number of windings involved. But, it is possible that only one phase is used to represent three phases of the induction motor as called phase segregation method. The phase segregation method provides equivalent circuits for both the steady and transient states of induction motor. In this paper, analysis of the torque transient of the induction motor be carried out the phase segregation method and confirmed in the possibility of transientless torque control.

  • PDF

저주파 유도가열 장치용 싸이리스터 PWM 정류기의 특성분석 (Characteristic Analysis of Thyristor PWM Rectifier for low-frequency Induction Heating System)

  • 윤동철;이경빈;최영도;백승택;한병문;소용철
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2001년도 전력전자학술대회 논문집
    • /
    • pp.681-684
    • /
    • 2001
  • This paper proposes a new induction heating system composed of a thyristor PWM rectifier with a resonant commutation circuit. The operation of proposed system as first analyzed by a theoretical approach with equivalent circuits. And its verification was performed by computer simulations with EMTP. The proposed system can provide a solution for the power factor problem of the existing high-power induction heating system, which uses the line-commutated thyristor bridge in rectifier side.

  • PDF

A Novel Quasi-Resonant Snubber-Assisted ZCS-PWM DC-DC Converter with High Frequency Link

  • Fathy, Khairy;Kwon, Soon-Kurl
    • Journal of Power Electronics
    • /
    • 제7권2호
    • /
    • pp.124-131
    • /
    • 2007
  • In this paper, a novel type of auxiliary switched capacitor assisted edge resonant soft switching PWM resonant DC-DC converter with two simple auxiliary commutation lossless inductor snubbers is presented. The operation principle of this converter is described using the switching mode equivalent circuits. This newly developed multi resonant DC-DC converter can regulate its DC output AC power under a principle of constant frequency edge-resonant soft switching commutation by an asymmetrical PWM duty cycle control scheme. The high frequency power regulation and actual power characteristics of the proposed soft switching PWM resonant DC-DC converter are evaluated and discussed. The operating performances of the newly proposed soft switching inverter are represented based on simulation results from an applications point of view.

EMTP에 의한 고압 유도전동기의 진공차단기 스위칭서지 시뮬레이션 (The Simulation of VCB Switching Surge in the High Voltage Induction motors by EMTP)

  • 이은웅;김종겸;김일중;김택수;이성철
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1993년도 하계학술대회 논문집 B
    • /
    • pp.1001-1003
    • /
    • 1993
  • Steep-fronted surges associated with motor witching cause relatively large turn-to-turn winding stress. In order to calculate the surge level at the motor terminals, equivalent circuits consist of three parts with power sources, load cable and motor constants. This paper presents switching surges phenomena occurred in a high voltgae induction motor witching by EMTP.

  • PDF

A Novel Switched Capacitor Lossless Inductors Quasi-Resonant Snubber Assisted ZCS PWM High Frequency Series Load Resonant Inverter

  • Fathy, Khairy;Kang, Tae-Kyung;Kwon, Soon-Kurl;Suh, Ki-Young;Lee, Hyun-Woo;Nakaoka, Mutsuo
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2005년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
    • /
    • pp.169-171
    • /
    • 2005
  • In this paper, a novel type of auxiliary switched capacitor assisted edge resonant soft switching PWM series load resonant high frequency inverter with two auxiliary edge resonant lossless inductor snubbers is proposed for small consumer induction heating appliances. The operation principle of this high frequency inverter is described using the switching mode equivalent circuits. The practical effectiveness of the newly proposed soft switching inverter are discussed as compared with the conventional soft switching high frequency inverters based on simulation and experimental results from an application point of view.

  • PDF

Ultradense 2-to-4 decoder in quantum-dot cellular automata technology based on MV32 gate

  • Abbasizadeh, Akram;Mosleh, Mohammad
    • ETRI Journal
    • /
    • 제42권6호
    • /
    • pp.912-921
    • /
    • 2020
  • Quantum-dot cellular automata (QCA) is an alternative complementary metal-oxide-semiconductor (CMOS) technology that is used to implement high-speed logical circuits at the atomic or molecular scale. In this study, an optimal 2-to-4 decoder in QCA is presented. The proposed QCA decoder is designed using a new formulation based on the MV32 gate. Notably, the MV32 gate has three inputs and two outputs, which is equivalent two 3-input majority gates, and operates based on cellular interactions. A multilayer design is suggested for the proposed decoder. Subsequently, a new and efficient 3-to-8 QCA decoder architecture is presented using the proposed 2-to-4 QCA decoder. The simulation results of the QCADesigner 2.0.3 software show that the proposed decoders perform well. Comparisons show that the proposed 2-to-4 QCA decoder is superior to the previously proposed ones in terms of cell count, occupied area, and delay.

베이스 밴드 신호에서 PLL에 대한 지터 해석 (Jitter Analysis for the PLL in the Baseband Signal)

  • 류흥균;안수길
    • 대한전자공학회논문지
    • /
    • 제24권1호
    • /
    • pp.10-14
    • /
    • 1987
  • Considering transition gating of the input unipolar NRZ signal, the equivalent linear time-invariant model has been derived for the PLL in the timing clock recovery circuits. The magnitude of the alignment and accumulated jitter has been found along a chain of repeaters. For the timing recovery circuit of 90 Mbps optical communication system, the computer simulation shows that, for the first stage of the chain, the alignment jiter and the accumulated jitter are of -5.1766 dB and for the 7-th stage, the alignment jitter and accumulated jitter have the value of -1.0193dB, 4.9053 dB respectively.

  • PDF

VLSI의 논리설계 자동화를 위한 SDL 하드웨어 컴파일러 (A SDL Hardware Compiler for VLSI Logic Design Automation)

  • 조중휘;정정화
    • 대한전자공학회논문지
    • /
    • 제23권3호
    • /
    • pp.327-339
    • /
    • 1986
  • In this paper, a hardware compiler for symbolic description language(SDL) is proposed for logic design automation. Lexical analysis is performed for SDL which describes the behavioral characteristics of a digital system at the register transfer level by the proposed algorithm I. The algorithm I is proposed to get the expressions for the control unit and for the data transfer unit. In order to obtain the network description language(NDL) expressions equivalent to gate-level logic circuits, another algorithm, the the algorithm II, is proposed. Syntax analysis for the data formed by the algorithm I is also Performed using circuit elements such as D Flip-Flop, 2-input AND, OR, and NOT gates. This SDL hardware compiler is implemented in the programming language C(VAX-11/750(UNIX)), and its efficiency is shown by experiments with logic design examples.

  • PDF