• Title/Summary/Keyword: Embedded structure

Search Result 1,166, Processing Time 0.036 seconds

Monitoring of Retrofitted Reinforced Concrete Beams with Hybrid Fiber Reinforced Polymer (광섬유 센서를 이용한 복합 섬유 재료로 보강된 철근 콘크리트 보의 모니터링)

  • 이옥기;신영수;김기수;김종우
    • Proceedings of the Korea Concrete Institute Conference
    • /
    • 2001.11a
    • /
    • pp.509-514
    • /
    • 2001
  • The Fibre-optic Bragg grating (FBG) sensor is broadly accepted as a structural health monitoring device for Fibre reinforced plastic (FRP) materials by either embedding into or bonding onto the structures. The accuracy of the strain measured by using the FBG sensor is highly dependent on the bonding characteristics among the bare optical fibre, protective coating, adhesive layer and host material. In general, the signal extracted from the embedded FBG sensor should reflect the straining condition of the host structure. This paper presents a theoretical model to evaluate the differential strains between the bare fibre and host material with different adhesive thickness and modulus of the protective coating of the embedded FBG sensor.

  • PDF

Performance Improvement and Power Consumption Reduction of an Embedded RISC Core

  • Jung, Hong-Kyun;Jin, Xianzhe;Ryoo, Kwang-Ki
    • Journal of information and communication convergence engineering
    • /
    • v.10 no.1
    • /
    • pp.78-84
    • /
    • 2012
  • This paper presents a branch prediction algorithm and a 4-way set-associative cache for performance improvement of an embedded RISC core and a clock-gating algorithm with observability don’t care (ODC) operation to reduce the power consumption of the core. The branch prediction algorithm has a structure using a branch target buffer (BTB) and 4-way set associative cache that has a lower miss rate than a direct-mapped cache. Pseudo-least recently used (LRU) policy is used for reducing the number of LRU bits. The clock-gating algorithm reduces dynamic power consumption. As a result of estimation of the performance and the dynamic power, the performance of the OpenRISC core applied to the proposed architecture is improved about 29% and the dynamic power of the core with the Chartered 0.18 ${\mu}m$ technology library is reduced by 16%.

Analysis on the Effectiveness of the Filter Buffer for Low Power NAND Flash Memory (저전력 NAND 플래시 메모리를 위한 필터 버퍼의 효율성 분석)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • IEMEK Journal of Embedded Systems and Applications
    • /
    • v.7 no.4
    • /
    • pp.201-207
    • /
    • 2012
  • Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high power consumption and the low performance. In the convention memory research, a hierarchical filter mechanism can archive an effective performance improvement in terms of the power consumption. In order to attain the best filter structure for NAND flash memory, we selected a direct-mapped filter, a victim filter, a fully associative filter and a 4-way set associative filter for comparison in the performance analysis. According to the results of the simulation, the fully associative filter buffer with a 128byte fetching size can obtain the bet performance compared to another filter structures, and it can reduce the energy*delay product(EDP) by about 93% compared to the conventional NAND Flash memory.

An Efficient Implementation Architecture for Lifting Based High Speed Integer Wavelet Transform (리프팅 기반의 고속 정수 웨이블릿 변환의 효율적인 구현 구조)

  • Kim, Suc June;Jang, Young Jo
    • IEMEK Journal of Embedded Systems and Applications
    • /
    • v.7 no.4
    • /
    • pp.173-179
    • /
    • 2012
  • In this paper, we propose an efficient architecture for 2D IWT using an existing 1D IWT. Lifting based IWT is the architecture of which a multiplier is replaced by adders and shift registers. The structure is relatively simple and modular. The proposed architecture to process an image size with 256x256 pixels consists of 16 adders, 8 shift registers, and some memories. By processing two rows at the same time, 2D sub-band coefficients can be calculated immediately after 1D sub-band coefficients have been processed. The architecture is designed so that each image can be inputted consecutively. The number of adders and shift registers is increased by twice comparing the existing architecture, but the memory size and the execution time are decreased by half. The proposed architecture is implemented using Verilog-HDL and simulated using iSim. It is synthesized and demonstrated at ISE for xc5vlx330 in RPS3K board.

Smart Card Certification-Authority Distribution Scheme using Attributes-Based Re-Encryption (속성기반 재 암호화를 이용한 스마트카드 인증권한 분배스킴)

  • Seo, Hwa-Jeong;Kim, Ho-Won
    • IEMEK Journal of Embedded Systems and Applications
    • /
    • v.5 no.3
    • /
    • pp.168-174
    • /
    • 2010
  • User authentication is an important requirement to provide secure network service. Therefore, many authentication schemes have been proposed to provide secure authentication, such as key agreement and anonymity. However, authority of scheme is limited to one's self. It is inefficient when authenticated users grant a certification to other users who are in an organization which has a hierarchical structure, such as a company or school. In this paper, we propose the first authentication scheme to use Attributes-Based Re-encryption that creates a certification to other users with specified attributes. The scheme, which has expanded from Rhee et al. scheme, has optimized computation performance on a smart card, ensuring the user's anonymity and key agreement between users and server.

PDR Model : Test and fit observed data Obtained by Herschel PACS

  • Yun, Hyeong-Sik;Lee, Jeong-Eun;Lee, Seokho
    • The Bulletin of The Korean Astronomical Society
    • /
    • v.39 no.2
    • /
    • pp.81.1-81.1
    • /
    • 2014
  • We utilized a 2-D PDR code developed by Lee et al. (2014) to explore the observed OH line fluxes toward embedded protostars. This 2-D PDR code combines self-consistently the FUV radiative transfer, gas-energetics, chemistry, and line radiative transfer. We modeled two sources, GSS30-IRS1 and Elias29, which show conspicuous line emission in the Herschel/PACS wavelength range. The physical and chemical structure for a given embedded source was derived by fitting the PACS CO line fluxes. After exploring various parameter spaces, we conclude that IR-pumping effect either by the central IR source and dust in-situ is insignificant for OH emission, unlike previous studies. We here present a possible solution for the observed OH fluxes, which require a high OH abundance and temperature at the inner-part of the UV heated cavity wall.

  • PDF

Electrical properties of poly-Si TFT by crystallization method for embedded TFT memory application (임베다드 TFT 메모리 적용을 위한 결정화 방법에 따른 전기적 특성평가)

  • You, Hee-Wook;Cbo, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2010.06a
    • /
    • pp.356-356
    • /
    • 2010
  • In this paper, Poly silicon thin-film transistors (poly-Si TFTs) with employed the SPC (Solid phase crystallization) and ELA (Excimer laser annealing) methods on glass panel substrate are fabricated to investigate the electrical poperies. Poly-Si TFTs have recess-channel structure with formated source/drain regions by LPCVD n+ poly Si in low $650^{\circ}C$ temperature. the ELA-TFT show higher on/off current ratio and subthreshold swing than a-Si and SPC TFT that therefore, these results showed that the ELA-TFT might be beneficial for practical embedded TFT memory device application.

  • PDF

Design of the Embedded Webserver for Smart Building System (스마트 빌딩 시스템을 위한 임베디드 웹서버의 디자인)

  • Yu, Jong-Il;Shin, Seung-Woo;Chang, Kyung-Bae;Shim, Il-Joo;Park, Gwi-Tae
    • Proceedings of the KIEE Conference
    • /
    • 2004.07d
    • /
    • pp.2461-2464
    • /
    • 2004
  • Recently, research about optimizing network of IBS(Intelligent Building System) is in progress activity. When we install existent building control network using general PC, system's efficiency drops. Because server that is charged with the task process is not and is expensive. Also, CapEx(Capital Expenditure) rises because of setting up the network equipment to integrate different protocol in building system. In this paper, we suggests the embedded web server that has various network structure.

  • PDF

Implementation of Maim Memory DBMS for Efficient Transactions based on Embedded System (임베디드 시스템 상에서의 고속 트랜잭션을 위한 메인메모리 기반 데이터베이스 시스템 구현)

  • Kim, Young-Hwan;Son, Jae-Gi;Park, Chang-Won
    • Proceedings of the IEEK Conference
    • /
    • 2008.06a
    • /
    • pp.769-770
    • /
    • 2008
  • Mani Memory DataBase(MMDB) system store their data in main physical memory and provide very high-speed access. Conventional database system are optimized for the particular characteristics of disk storage mechanism. Memory resident systems, on the other hand, use different optimizations to structure and organize data, as well as to make it reliable. This paper provides a brief overview on MMDBs and the results after evaluating the performance of our simple MMDB based on Embedded system.

  • PDF

Design and Implementation of OSEK/VDX Development Tool for Automotive Applications (OSEK/VDX 기반의 차량 전장용 응용개발도구 설계 및 구현)

  • Ahn, SungHo;Kim, JaeYoung;Kim, GwangSu
    • IEMEK Journal of Embedded Systems and Applications
    • /
    • v.4 no.2
    • /
    • pp.84-89
    • /
    • 2009
  • This paper describes the development tool for applications of automotive electronic control unit based on OSEK/VDX. This development tool has a plug-in structure and is written in Java language, because of being based on Eclipse CDT. And also this development tool has another functionality of expansion, which means a special function block can be easily adopted in this development tool. Currently, this development tool consists of five blocks, which are integrated development environment block, fusing program block, system generation block, debugger block, and cross-compiler toolchain block. They have relationship between each other and work for developing OSEK/VDX-based applications. In this paper, we show the functionality of each block of this development tool and its implementation.

  • PDF