• Title/Summary/Keyword: Embedded Passive

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Design and Implementation of Miniature VCO using LTCC Technique (LTCC 기법을 이용한 초소형 VCO 설계 및 구현)

  • 김태현;권원현;이영훈
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.11
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    • pp.1176-1183
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    • 2003
  • In this paper, miniature voltage-controlled oscillator(VCO) for 1.6 ㎓ PCS band is designed and implemented using the LTCC technique. Circuit level design using commercial components is performed, and passive L, C elements embedded in LTCC substrate is optimized by simulation tools. Embedded passive components are modeled into equivalent circuits and their circuit parameters are extracted for circuit simulation. Utilizing the designed embedded passive elements and 21 layers LTCC substrate, VCO with 4.0${\times}$4.0${\times}$1.6 ㎣ dimensions is designed and fabricated. Developed VCO operates in 2.7 V with 8.5 ㎃ current consumption. The phase noise performance of VCO is below -112.61 ㏈c/㎐ at 100 ㎑ offset and harmonic suppression characteristics is measured above -30 ㏈.

Modeling of High-speed 3-Disional Embedded Inductors (고속 3차원 매립 인덕터에 대한 모델링)

  • 이서구;최종성;윤일구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.139-142
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    • 2001
  • As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

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Modeling of 3-D Embedded Inductors Fabricated in LTCC Process (저온 동시소성 공정으로 제작된 3차원 매립 인덕터 모델링)

  • 이서구;최종성;윤일구
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.4
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    • pp.344-348
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    • 2002
  • As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

Statistical Analysis of Three-dimensional Embedded Passive Devices (3차원 매립형 수동소자에 대한 통계적 분석)

  • Shin, Dong-Wook;Oh, Chang-Hoon;Lee, Kyu-Bok;Kim, Jong-Kyu;Yun, Il-Gu
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.593-596
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    • 2002
  • In this paper, the effect of device model parameter variation on three-dimensional embedded passive devices was investigated using statistical analysis. The optimized equivalent circuit models for several different structures were obtained from HSPICE simulation. The mean and the standard deviation of model parameters were extracted and the sensitivity analysis for each component was performed. From the analysis, the performance and parametric yield of the devices can be analyzed.

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Highly Miniaturized and Performed UWB Bandpass Filter Embedded into PCB with SrTiO3 Composite Layer

  • Cheon, Seong-Jong;Park, Jun-Hwan;Park, Jae-Yeong
    • Journal of Electrical Engineering and Technology
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    • v.7 no.4
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    • pp.582-588
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    • 2012
  • In this paper, a highly miniaturized and performed UWB bandpass filter has been newly designed and implemented by embedding all the passive elements into a multi-layered PCB substrate with high dielectric $SrTiO_3$ composite film for 3.1 - 4.75 GHz compact UWB system applications. The high dielectric composite film was utilized to increase the capacitance densities and quality factors of capacitors embedded into the PCB. In order to reduce the size of the filter and avoid parasitic EM coupling between the embedded filter circuit elements, it was designed by using a $3^{rd}$ order Chebyshev circuit topology and a capacitive coupled transformation technology. Independent transmission zeros were also applied for improving the attenuation of the filter at the desired stopbands. The measured insertion and return losses in the passband were better than 1.68 and 12 dB, with a minimum value of 0.78 dB. The transmission zeros of the measured response were occurred at 2.2 and 5.15 GHz resulting in excellent suppressions of 31 and 20 dB at WLAN bands of 2.4 and 5.15 GHz, respectively. The size of the fabricated bandpass filter was $2.9{\times}2.8{\times}0.55(H)mm^3$.

Product and Properties of Embedded Capacitor by Aerosol Deposition (Aerosol Deposition에 의한 Embedded Capacitor의 제조 및 특성 평가)

  • Yoo, Hyo-Sun;Cho, Hyun-Min;Park, Se-Hoon;Lee, Kyu-Bok;Kim, Hyeong-Joon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.313-313
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    • 2008
  • Aerosol Deposition(AD) method is based on the impact consolidation phenomenon of ceramic fine particles at room temperature. AD is promising technology for the room temperature deposition of the dielectrics thin films with high quality. Embedding of passive components such as capacitors into printed circuit board is becoming an important strategy for electronics miniaturization and device reliability, manufacturing cost reduction. So, passive integration using aerosol deposition. In this study, we examine the effects of the characteristics of raw powder on the thickness, roughness, electrical properties of $BaTiO_3$ thin films. Thin films were deposited on the copper foil and copper plate. Electrical and material properties was investigated as a change of annealing temperature. We final aim the effects of before and after of laminated on the electrical properties and suit of embedded capacitor.

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