• Title/Summary/Keyword: Electronic devices

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Capacitance and Output Current Control by CNT Concentration in the CNT/PVDF Composite Films for Electronic Devices (전자소자로의 응용을 위한 CNT/PVDF 복합막에서 CNT 조성에 의한 정전용량과 출력전류 제어)

  • Lee, Sunwoo;No, Im-Jun;Shin, Paik-Kyun;Kim, Yongjin
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.8
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    • pp.1115-1119
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    • 2013
  • The carbon nanotube/poly-vinylidene fluoride (CNT/PVDF) composite films for the use of electronic devices were fabricated by spray coating method using the CNT/PVDF solution, which was prepared by adding PVDF pellets into the CNT dispersed N-Methyl-2-pyrroli-done (NMP) solution. The CNT/PVDF composite films were peeled off from the glass substrate and were investigated by the scanning electron microscopy, which revealed that the CNTs were uniformly dispersed in the PVDF films and thickness of the films were approximately $20{\mu}m$. The capacitance of the CNT/PVDF films increased dramatically by adding CNTs into the PVDF matrix, and finally saturated approximately 1880 pF. However, the I-V curves didn't show any saturation effect in the CNT concentration range of 0 ~ 0.04 wt%. Therefore we can control the performance of the devices from the CNT/PVDF composite film by adjusting the current level resulted from the CNT concentration with the uniform capacitance value.

Improvement in the Stabilities of White Organic Light Emitting Diodes Using a Partially Doped Emission Layer

  • Jeon, Hyeon-Sung;Oh, Hwan-Sool;Yoon, Seok-Beom
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.3
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    • pp.145-148
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    • 2010
  • White organic light emitting devices were fabricated to improve the stability through a structural change using the two peak emission method. The fabricated devices were composed of indium tin oxide (100 nm)/ $\alpha$-NPD (30 nm)/4,40-bis(2,20-diphenylvinyl)-1,10-biphenyl (DPVBi, d: variable)/DPVBi: Rubrene (40 nm)/2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline(5 nm)/ $Alq_3$(5 nm)/ Al (100 nm). A DPVBi for blue emissions was used as the host material in the emitters. The doping concentration of the Rubrene was fixed at 2.0% (by weight). The white emission with Commission Internationale De L'Eclairage coordinates of (0.3342, 0.3439) occurred at 14 V with a thickness d of 1 nm. It was insensitive to the drive voltage, and the devices had a maximum luminance of $211\;cd/cm^2$. At 19 V, the current density and maximum external quantum efficiency were $173\;mAcm^2$ and 0.478%, respectively.

Preparation of Epoxy/Organoclay Nanocomposites for Electrical Insulating Material Using an Ultrasonicator

  • Park, Jae-Jun;Park, Young-Bum;Lee, Jae-Young
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.3
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    • pp.93-97
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    • 2011
  • In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a 0.35 ${\mu}M$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and 1.5 ${\mu}M$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($I_{SUB}$), drain to source leakage current ($I_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.

Electrostatic bonding between Si and ITO-coated #7059 glass substrates (실리콘 기판과 ITO가 코팅된 #7059 유리 기판간의 정전 열 접합)

  • Ju, Hyeong-Kwon;Chung, Hoi-Hwan;Kim, Young-Cho;Han, Jeong-In;Cho, Kyoung-Ik;Oh, Myung-Hwan
    • Journal of Sensor Science and Technology
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    • v.7 no.3
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    • pp.211-217
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    • 1998
  • Si and ITO-coated #7059 glass wafers were electrostatically bonded by employing #7740 interlayer. It was inferred that the thermionic- electrostatic migration of $Na^{+}$ ions in the #7740 interlayer played an important role in the bonding process through SIMS analysis. The temperature and voltage required for reliable electrostatic bonding were in the range of $180{\sim}200^{\circ}C$ and $50{\sim}70V_{dc}$(10min), respectively. The low temperature Si-ITO coated glass bonding can be effectively applied to the packaging of field emission devices.

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Adaptive Cloud Offloading of Augmented Reality Applications on Smart Devices for Minimum Energy Consumption

  • Chung, Jong-Moon;Park, Yong-Suk;Park, Jong-Hong;Cho, HyoungJun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.9 no.8
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    • pp.3090-3102
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    • 2015
  • The accuracy of an augmented reality (AR) application is highly dependent on the resolution of the object's image and the device's computational processing capability. Naturally, a mobile smart device equipped with a high-resolution camera becomes the best platform for portable AR services. AR applications require significant energy consumption and very fast response time, which are big burdens to the smart device. However, there are very few ways to overcome these burdens. Computation offloading via mobile cloud computing has the potential to provide energy savings and enhance the performance of applications executed on smart devices. Therefore, in this paper, adaptive mobile computation offloading of mobile AR applications is considered in order to determine optimal offloading points that satisfy the required quality of experience (QoE) while consuming minimum energy of the smart device. AR feature extraction based on SURF algorithm is partitioned into sub-stages in order to determine the optimal AR cloud computational offloading point based on conditions of the smart device, wireless and wired networks, and AR service cloud servers. Tradeoffs in energy savings and processing time are explored also taking network congestion and server load conditions into account.

Vacuum Packaging Technology of AC-PDP using Direct-Joint Method

  • Lee, Duck-Jung;Lee, Yun-Hi;Moon, Gwon-Jin;Kim, Jun-Dong;Choi, Won-Do;Lee, Sang-Geun;Jang, Jin;Ju, Byeong-Kwon
    • Journal of Information Display
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    • v.2 no.4
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    • pp.34-38
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    • 2001
  • We suggested new PDP packaging technology using the direct joint method, which does not need an exhausting hole and tube. The advantages of this method are simple process, short process time and time panel package. To packaging, we drew the seal line of glass frit by dispenser followed by forming the lump, which provide pumping-out path during the packaging process. And, we have performed a pretreatment of glass frit to reduce the out-gases. After which, both front and rear glass plates were aligned and loaded into vacuum packaging chamber. The 4-inch monochrome AC-PDP was successfully packaged and fully emitted with brightness of 1000 $cd/m^2$. Also, glass frit properties for pretreatment condition was investigated by AES and SEM analyses.

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Protection Circuit Design of Electronic Ballcst for MHD Lamps (MHD 램프용 전자식 안정기의 보호 회로 설계)

  • Lee, Bong-Jin;Kim, Ki-Nam;Park, Chong-Yun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.6
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    • pp.1-6
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    • 2008
  • In this paper describes the process of designing a protection circuit against an open or short electronic ballast. An open electronic ballast creates high voltages in a regular period, which a lies voltage stress on switching devices. On the other hand, a shorted output generates excessive current, causing problems such as heat generation in the ballast and reduced lifespan of semiconductor devices. This study proposes a protection circuit consisting of TTL and passive devices to resolve the problems. The proposed protection circuit offers the benefits of low cost and high reliability. The proposed circuit was connected to an actual ballast to demonstrate its applicability.

Study on compensation of thermal stresses in multilayered materials

  • Han, Jin-Woo;Kim, Jong-Yeon;Kim, Byoung-Yong;Han, Jeong-Min;Moon, Hyun-Chan;Park, Kwang-Bum;Seo, Dae-Shik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.413-413
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    • 2007
  • In recent years, flexible display devices such as liquid crystal display (LCD), organic light emitting diode (OLED), etc. have attracted considerable interest in a wide variety of applications. Polymer substrate is absolutely necessary to realize this kind of flexible display devices. Using the polymer as a substrate, there are lots of advantages including not only mechanical flexibility such as rolling and bending characteristics but also light weights, low cost and so on. In detail, thickness and weights is only one forth and one second of glass substrate, respectively. However, it needs low temperature below $150^{\circ}C$ in the fabrication process comparing to conventional deposition process. The polymer substrate is not thermally stable as much as the glass substrate so that some deformation can be occurred according to variation of temperature. In particular, performance of devices can be easily deteriorated by shrinkage of substrate when heating it. In this paper, pre-annealing and deposition of buffer layer was introduced and studied to solve previously mentioned problems of the shrinkage and followed shear stress.

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Research on Silicon Nanowire Transistors for Future Wearable Electronic Systems (차세대 웨어러블 전자시스템용 실리콘 나노선 트랜지스터 연구)

  • Im, Kyeungmin;Kim, Minsuk;Kim, Yoonjoong;Lim, Doohyeok;Kim, Sangsig
    • Vacuum Magazine
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    • v.3 no.3
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    • pp.15-18
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    • 2016
  • In future wearable electronic systems, 3-dimensional (3D) devices have attracted much attention due to their high density integration and low-power functionality. Among 3D devices, gate-all-around (GAA) nanowire transistor provides superior gate controllability, resulting in suppressing short channel effect and other drawbacks in 2D metal-oxide-semiconductor field-effect transistor (MOSFET). Silicon nanowires (SiNWs) are the most promising building block for GAA structure device due to their compatibility with the current Si-based ultra large scale integration (ULSI) technology. Moreover, the theoretical limit for subthreshold swing (SS) of MOSFET is 60 mV/dec at room temperature, which causes the increase in Ioff current. To overcome theoretical limit for the SS, it is crucial that research into new types of device concepts should be performed. In our present studies, we have experimentally demonstrated feedback FET (FBFET) and tunnel FET (TFET) with sub-60 mV/dec based on SiNWs. Also, we fabricated SiNW based complementary TFET (c-TFET) and SiNW complementary metal-oxide-semiconductor (CMOS) inverter. Our research demonstrates the promising potential of SiNW electronic devices for future wearable electronic systems.

Performance Analysis of coverage probability according to transmission range of devices (단말의 통신 반경 변화에 따른 포함 확률 성능 분석)

  • Han, Seho;Lee, Howon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.10
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    • pp.1881-1886
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    • 2016
  • In this paper, by using D2D communications that perform direct communications among devices within small transmission range of each device without base station, we assume that a device generates and transmits data packets to other proximate devices and the devices which receive the data packets relay those to other adjacent devices. To maximize the total number of devices which successfully receive data packets, Epidemic routing protocol is considered in this paper. In Epidemic routing protocol, all devices which received data packets try to relay the packets to other adjacent devices. We assume various network environment where devices are densely distributed in specific area(crowded area). In this environment, D2D SD can be a source node and D2D devices can be relay nodes. By setting transmission range of D2D SD and D2D devices as parameters, we analyze performance results of coverage probability of Epidemic routing protocol through intensive simulations.