• Title/Summary/Keyword: Electronic devices

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Study on Frequency Selection Method Using Case-Based Reasoning for Cognitive Radio (사례기반 추론 기법을 이용한 인지 라디오 주파수 선택 방법 연구)

  • Park, Jae-Hoon;Choi, Jeung Won;Um, Soo-Bin;Lee, Won-Cheol
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.12 no.1
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    • pp.58-71
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    • 2019
  • This paper proposes architecture of a cognitive radio engine platform and the allowable frequency channel reasoning method that enables acquisition of the allowable channels for the military tactical network environment. The current military tactical wireless communication system is increasing need to secure a supplementary radio frequency to ensure that multiple wireless networks for different military wireless devices coexist, so that tactical wireless communication between the same or different systems can be operated effectively. This paper presents the allowable frequency channel reasoning method based on cognitive radio engine for realizing DSA(Dynamic Spectrum Access) as an optimal available frequency channel. To this end, a case-based allowable frequency channel reasoning method for cognitive radio devices is proposed through modeling of primary user's traffic status and calculation of channel occupancy probability. Also through the simulation of the performance analysis, changing rate of collision probability between the primary users' occupancy channel and the available channel acquisition information that can be used by the cognitive radio device was analysed.

Design and Simulation Study on Three-terminal Graphene-based NEMS Switching Device (그래핀 기반 3단자 NEMS 스위칭 소자 설계 및 동작 시뮬레이션 연구)

  • Kwon, Oh-Kuen;Kang, Jeong Won;Lee, Gyoo-Yeong
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.8 no.6
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    • pp.939-946
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    • 2018
  • In this work, we present simple schematics for a three-terminal graphene-based nanoelectromechanical switch with the vertical electrode, and we investigated their operational dynamics via classical molecular dynamics simulations. The main structure is both the vertical pin electrode grown in the center of the square hole and the graphene covering on the hole. The potential difference between the bottom gate of the hole and the graphene of the top cover is applied to deflect the graphene. By performing classical molecular dynamic simulations, we investigate the nanoelectromechanical properties of a three-terminal graphene-based nanoelectromechanical switch with vertical pin electrode, which can be switched by the externally applied force. The elastostatic energy of the deflected graphene is also very important factor to analyze the three-terminal graphene-based nanoelectromechanical switch. This simulation work explicitly demonstrated that such devices are applicable to nanoscale sensors and quantum computing, as well as ultra-fast-response switching devices.

Development of High-Performance LNMO Based Thin-Film Battery through Amorphous V2O5 Interlayer Insertion (비정질 V2O5 중간층 삽입을 통한 고성능 LNMO기반 박막 배터리 개발)

  • Kwon, Oh Hyuk;Kim, Jong Heon;Park, Jun Seob;Kim, Hyun-Suk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.35 no.2
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    • pp.194-198
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    • 2022
  • All-solid-state thin-film battery can realize the integration of electronic circuits into small devices. However, a high voltage cathode material is required to compensate for the low energy density. Therefore, it is necessary to study all-solid-state thin-film battery based on the high voltage cathode material LNMO. Nevertheless, the electrochemical properties deteriorate due to the problem of the interface between LiNi0.5Mn1.5O4 (LNMO) and the solid electrolyte LiPON. In this study, to solve this problem, amorphous V2O5 was deposited as an interlayer between LNMO and LiPON. We confirmed the possibility of improving cycle performance of LNMO based thin-film battery. We expect that the results of this study can extend the battery lifespan of small devices using LNMO based all-solid-state thin-film battery.

Accelerated Thermal Aging Test for Predicting Lifespan of Urethane-Based Elastomer Potting Compound

  • Min-Jun Gim;Jae-Hyeon Lee;Seok-Hu Bae;Jung-Hwan Yoon;Ju-Ho Yun
    • Elastomers and Composites
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    • v.59 no.2
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    • pp.73-81
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    • 2024
  • In the field of electronic components, the potting material, which is a part of the electronic circuit package, plays a significant role in protecting circuits from the external environment and reducing signal interference among electronic devices during operation. This significantly affects the reliability of the components. Therefore, the accurate prediction and assessment of the lifespan of a material are of paramount importance in the electronics industry. We conducted an accelerated thermal aging evaluation using the Arrhenius technique on elastic potting material developed in-house, focusing on its insulation, waterproofing, and contraction properties. Through a comprehensive analysis of these properties and their interrelations, we confirmed the primary factors influencing molding material failure, as increased hardness is related to aggregation, adhesion, and post-hardening or thermal-aging-induced contraction. Furthermore, when plotting failure times against temperature, we observed that the hardness, adhesive strength, and water absorption rate were the predominant factors up to 120 ℃. Beyond this temperature, the tensile properties were the primary contributing factors. In contrast, the dielectric constant and loss tangent, which are vital for reducing signal interference in electric devices, exhibited positive changes(decreases) with aging and could be excluded as failure factors. Our findings establish valuable correlations between physical properties and techniques for the accurate prediction of failure time, with broad implications for future product lifespans. This study is particularly advantageous for advancing elastic potting materials to satisfy the stringent requirements of reliable environments.

Simulation of Potential Difference Analysis in Conductor-Dielectric Type Triboelectric Generator Using COMSOL Multiphysics (COMSOL Multiphysics를 활용한 도체-유전체 형태 마찰전기 발전기의 전위차 해석 시뮬레이션)

  • Yong Hoon Son;Geon-Tae Hwang
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.6
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    • pp.600-608
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    • 2024
  • In the era of the Fourth Industrial Revolution, electronic devices are becoming increasingly miniaturized and lightweight to overcome spatial limitations, necessitating lower power consumption. Triboelectric nanogenerators (TENGs), which convert mechanical energy into electrical energy, offer an ideal solution as small-scale power generators for these compact devices. Recent research has focused on various materials and structural designs to maximize the output of triboelectric energy harvesters, highlighting the growing importance of theoretical structure analysis software for precise evaluation. COMSOL Multiphysics software provides an accurate method for simulating the electrical characteristics of TENGs. This Tutorial Status Report introduces the process of modeling TENGs and analyzing their electrical output using COMSOL Multiphysics

Investigation of Hetero - Material - Gate in CNTFETs for Ultra Low Power Circuits

  • Wang, Wei;Xu, Min;Liu, Jichao;Li, Na;Zhang, Ting;Jiang, Sitao;Zhang, Lu;Wang, Huan;Gao, Jian
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.1
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    • pp.131-144
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    • 2015
  • An extensive investigation of the influence of gate engineering on the CNTFET switching, high frequency and circuit level performance has been carried out. At device level, the effects of gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. It is revealed that hetero - material - gate CNTFET(HMG - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, and is more suitable for use in low power and high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the performance parameters of circuits have been calculated and the optimum combinations of ${\Phi}_{M1}/{\Phi}_{M2}/{\Phi}_{M3}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product(PDP). We show that, compared to a traditional CNTFET - based circuit, the one based on HMG - CNTFET has a significantly better performance (SNM, energy, PDP). In addition, results also illustrate that HMG - CNTFET circuits have a consistent trend in delay, power, and PDP with respect to the transistor size, indicating that gate engineering of CNTFETs is a promising technology. Our results may be useful for designing and optimizing CNTFET devices and circuits.

Study on Development for Smart Door Lock and App. using Arduino and Infrared Sensor (아두이노와 적외선 센서를 이용한 스마트 도어락과 앱 개발에 대한 연구)

  • Hyeomg-Jun, Jeon;Yoon-Soo, Na;Yeo-Gyun, Youn;Kyeong-Ho, Kim;Hee-Woon, Ahn;Jae-Wook, Kim
    • The Journal of the Korea institute of electronic communication sciences
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    • v.17 no.6
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    • pp.1199-1206
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    • 2022
  • In this paper, unlike door locks that are controlled only by the existing keypad because electronic devices can be easily operated through apps on smartphones in modern society, an app was created using app inventory so that door locks can be controlled using smartphones. Through the Bluetooth module experiment, the communication distance with the smartphone was controlled up to 10m when there were no obstacles, and through the voice recognition experiment, the recognition rate was 85% and 90% at 500~1000Hz and 1000~1500Hz, respectively, and 70% and 80% at 80dB noise. Through the results of the experimental evaluation, it was confirmed that convenience and security could be improved.

Recent Research Trends in Touchscreen Readout Systems (최근 터치스크린 Readout 시스템의 연구 경향)

  • Jun-Min Lee;Ju-Won Ham;Woo-Seok Jang;Ha-Min Lee;Sang-Mo Koo;Jong-Min Oh;Seung-Hoon Ko
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.36 no.5
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    • pp.423-432
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    • 2023
  • With the increasing demand for mobile devices featuring multi-touch operation, extensive research is being conducted on touch screen panel (TSP) Readout ICs (ROICs) that should possess low power consumption, compact chip size, and immunity to external noise. Therefore, this paper discusses capacitive touch sensors and their readout circuits, and it introduces research trends in various circuit designs that are robust against external noise sources. The recent state-of-the-art TSP ROICs have primarily focused on minimizing the impact of parasitic capacitance (Cp) caused by thin panel thickness. The large Cp can be effectively compensated using an area-efficient current compensator and Current Conveyor (CC), while a display noise reduction scheme utilizing a noise-antenna (NA) electrode significantly improves the signal-to-noise ratio (SNR). Based on these achievements, it is expected that future TSP ROICs will be capable of stable operation with thinner and flexible Touch Screen Panels (TSPs).

The 1/f Noise Analysis of 3D SONOS Multi Layer Flash Memory Devices Fabricated on Nitride or Oxide Layer (산화막과 질화막 위에 제작된 3D SONOS 다층 구조 플래시 메모리소자의 1/f 잡음 특성 분석)

  • Lee, Sang-Youl;Oh, Jae-Sub;Yang, Seung-Dong;Jeong, Kwang-Seok;Yun, Ho-Jin;Kim, Yu-Mi;Lee, Hi-Deok;Lee, Ga-Won
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.2
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    • pp.85-90
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    • 2012
  • In this paper, we compared and analyzed 3D silicon-oxide-nitride-oxide-silicon (SONOS) multi layer flash memory devices fabricated on nitride or oxide layer, respectively. The device fabricated on nitride layer has inferior electrical properties than that fabricated on oxide layer. However, the device on nitride layer has faster program / erase speed (P/E speed) than that on the oxide layer, although having inferior electrical performance. Afterwards, to find out the reason why the device on nitride has faster P/E speed, 1/f noise analysis of both devices is investigated. From gate bias dependance, both devices follow the mobility fluctuation model which results from the lattice scattering and defects in the channel layer. In addition, the device on nitride with better memory characteristics has higher normalized drain current noise power spectral density ($S_{ID}/I^2_D$>), which means that it has more traps and defects in the channel layer. The apparent hooge's noise parameter (${\alpha}_{app}$) to represent the grain boundary trap density and the height of grain boundary potential barrier is considered. The device on nitride has higher ${\alpha}_{app}$ values, which can be explained due to more grain boundary traps. Therefore, the reason why the devices on nitride and oxide have a different P/E speed can be explained due to the trapping/de-trapping of free carriers into more grain boundary trap sites in channel layer.

Effects of Pre-synthesized $BaTiO_3$ Addition on the Microstructure and Dielectric/ Piezoelectric Properties of $(Bi_{0.5}Na_{0.5})_{0.94}Ba_{0.06}TiO_3$ Piezoelectric Ceramics

  • Khansur, Neamul Hayet;Yoon, Man-Soon;Kweon, Soon-Yong;Lee, Young-Geun;Ur, Soon-Chul
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.189-189
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    • 2008
  • Due to the environmental issue vast research is going on to replace the widely used lead contented piezoelectric materials. Bismuth sodium titanate (abbreviated as BNT) based bismuth sodium titanate-barium titanate (abbreviated as BNBT) ceramic was prepared by using modified method rather than conventional mixed oxide method. This modification was made to improve the properties of BNT based ceramic. In this procedure $BaTiO_3$ (abbreviated as BT) was prepared using conventional mixed oxide method. Analytical grade raw materials of $BaCO_3$ and $TiO_2$ were weighted and ball milled using ethanol medium. The mixed slurry was dried and sieved under 80 mesh. Then the powder was calcined at $1100^{\circ}C$ for 2 hours. This calcined BT powder was used in the preparation of BNBT. Stoichiometric amount of $Bi_2O_3$, $Na_2CO_3$, $TiO_2$ and BT were weighted and mixed by using ball mill. The used calcination temperature was $850^{\circ}C$ for 2 hours. Calcined powder was taken for another milling step. BNBT disks were pressed to 15 mm of diameter and then cold isostatical press (CIP) was used. Pressed samples were sintered at $1150^{\circ}C$ for 2 hours. The SEM microstructure analysis revealed that the grain shape of the sintered ceramic was polyhedral and grain boundary was well matched where as the sample prepared by conventional method showed irregular arrangement and grain boundary not well matched. And sintered density was better (5.78 g/cc) for the modified method. It was strongly observed that the properties of BNBT ceramic near MPB composition was found to be improved by the modified method compare to the conventional mixed oxide method. The piezoelectric constant dB of 177.33 pC/N, electromechanical coupling factor $k_p$ of 33.4%, dielectric constant $K_{33}^T$ of 688.237 and mechanical quality factor $Q_m$ of 109.37 was found.

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