• Title/Summary/Keyword: Electronic Circuits

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Parameters of the Electric and Magnetic Fields Due to Cloud-to-Ground Lightnings (낙뢰에 의한 전계와 자계 파형의 파라미터)

  • 이복희;안창환
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.9 no.3
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    • pp.359-368
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    • 1998
  • One of the topics concerning the electromagnetic compatibility of modern electronic circuits is to take protection from transient overvoltages caused by not only cloud-to-ground lightnings but also induced lightning discharges. In this paper, the vertical electric and horizontal magnetic fields from cloud-to-ground lightnings were measured and analyzed. The electric and magnetic fields waveforms associated with cloud-to-ground lightnings have several subsidiary peaks which decrease with time. There were not much differences between the electric and magnetic field due to long distance cloud-to-ground discharges. Average values of 10~90% rise times of electric fields are $4.65mutextrm{s}$ for the positive cloud-to-ground lightning and $3.29mutextrm{s}$ for the negative cloud-to-ground lightning, respectively. Also, in the positive and negative cloud-to-ground lightning discharges, the zero-to-zero crossing times in the wave tail of magnetic fields are significantly longer than those of the electric fields.

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Dependence of Hot Electron Effects on Temperature in The Deep Submicron SOI n-Channel MOSFETs (Deep Submicron SOI n-채널 MOSFET에서 열전자 효과들의 온도 의존성)

  • Park, Keun-Hyung;Cha, Ho-Il
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.2
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    • pp.189-194
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    • 2018
  • Nowadays most integrated circuits are built using the bulk CMOS technology, but it has much difficulty in further reduction of the power consumption and die size. As a super low-power technology to solve such problems, the SOI technology attracts great attention recently. In this paper, the study results of the temperature dependency of the hot carrier effects in the n-channel MOSFETs fabricated on the thin SOI substrate were discussed. In spite that the devices employed the LDD structure, the hot carrier effects were more serious than expected due to the high series resistance between the channel region and the substrate contact to the ground, and were found to be less serious for the higher temperature with the more phonon scattering in the channel region, which resulted in reducing the hot electron generation.

Analysis of Subthreshold Swing for Channel Doping of Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 채널도핑에 따른 문턱전압이하 스윙 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.3
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    • pp.651-656
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    • 2014
  • This paper analyzed the change of subthreshold swing for channel doping of asymmetric double gate(DG) MOSFET. The subthreshold swing is the factor to describe the decreasing rate of off current in the subthreshold region, and plays a very important role in application of digital circuits. Poisson's equation was used to analyze the subthreshold swing for asymmetric DGMOSFET. Asymmetric DGMOSFET could be fabricated with the different top and bottom gate oxide thickness and bias voltage unlike symmetric DGMOSFET. It is investigated in this paper how the doping in channel, gate oxide thickness and gate bias voltages for asymmetric DGMOSFET influenced on subthreshold swing. Gaussian function had been used as doping distribution in solving the Poisson's equation, and the change of subthreshold swing was observed for projected range and standard projected deviation used as parameters of Gaussian distribution. Resultly, the subthreshold swing was greatly changed for doping concentration and profiles, and gate oxide thickness and bias voltage had a big impact on subthreshold swing.

The Characteristics Analysis of Novel Moat Structures in Shallow Trench Isolation for VLSI (초고집적용 새로운 회자 구조의 얕은 트랜치 격리의 특성 분석)

  • Lee, Yong-Jae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.10
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    • pp.2509-2515
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    • 2014
  • In this paper, the conventional vertical structure for VLSI circuits CMOS intend to improve the stress effects of active region and built-in threshold voltage. For these improvement, the proposed structure is shallow trench isolation of moat shape. We want to analysis the electron concentration distribution, gate bias vs energy band, thermal stress and dielectric enhanced field of thermal damage between vertical structure and proposed moat shape. Physically based models are the ambient and stress bias conditions of TCAD tool. As an analysis results, shallow trench structure were intended to be electric functions of passive as device dimensions shrink, the electrical characteristics influence of proposed STI structures on the transistor applications become stronger the potential difference electric field and saturation threshold voltage, are decreased the stress effects of active region. The fabricated device of based on analysis results data were the almost same characteristics of simulation results data.

Pixel-level Current Mirroring Injection with 2-step Bias-current Suppression for 2-D Microbolometer FPAs (이차원 마이크로볼로미터 FPA를 위한 이 단계 바이어스 전류 억제 방식을 갖는 픽셀 단위의 전류 미러 신호취득 회로)

  • Hwang, Chi Ho;Woo, Doo Hyung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.11
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    • pp.36-43
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    • 2015
  • A pixel-level readout circuit is studied for 2-dimensional microbolometer focal plane arrays (FPAs). A current mirroring injection (CMI) input circuit with 2-step current-mode bias suppression is proposed for a pixel-level architecture with high responsivity and long integration time. The proposed circuit has been designed using a $0.35-{\mu}m$ 2-poly 4-metal CMOS process for a $320{\times}240$ microbolometer array with a pixel size of $50{\mu}m{\times}50{\mu}m$. The proposed 2-step bias-current suppression has sufficiently low calibration error with wide calibration range, and the calibration range and error can be easily optimized by controlling some design parameters. Due to high responsivity and a long integration time of more than 1 ms, the noise equivalent temperature difference (NETD) of the proposed circuit can be improved to 26 mK, which is much better than that of the conventional circuits, 67 mK.

Phase-Shift Full-Bridge DC-DC Converter using the One-Chip Micom (단일칩 마이컴을 이용한 위상변위 방식 풀브리지 직류-직류 전력변환기)

  • Jeong, Gang-Youl
    • Journal of IKEEE
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    • v.25 no.3
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    • pp.517-527
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    • 2021
  • This paper presents the phase-shift full-bridge DC-DC converter using the one-chip micom. The proposed converter primary is the full-bridge power topology that operates with the unipolar pulse-width modulation (PWM) by the phase-shift method, and the secondary is the full-bridge full-wave rectifier composed of four diodes. The control of proposed converter is performed by the one-chip micom and its MOSFET switches are driven by the bootstrap circuit. Thus the total system of proposed converter is simple. The proposed converter achieves high-efficiency using the resonant circuit and blocking capacitor. In this paper, first, the power-circuit operation of proposed converter is explained according to each operation mode. And the power-circuit design method of proposed converter is shown, and the software control algorithm on the micom and the feedback and switch drive circuits operating the proposed converter are described, briefly. Then, the operation characteristics of proposed converter are validated through the experimental results of a designed and implemented prototype converter by the shown design and implementation method in this paper. The highest efficiency in the results was about 92%.

Design of W-band Cascode Mixer with High Conversion Gain using 0.1-μm GaAs pHEMT Process (0.1-μm GaAs pHEMT 공정을 이용한 높은 변환이득을 가지는 W-대역 캐스코드 혼합기 설계)

  • Choe, Wonseok;Kim, HyeongJin;Kim, Wansik;Kim, Jongpil;Jeong, Jinho
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.6
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    • pp.127-132
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    • 2018
  • In this paper, a high conversion gain cascode mixer was designed in W-band and verified by the fabrication and measurements. In the high frequency band such as a W-band, the conversion loss of a mixer is increased because of the poor performance of transistors. This high conversion loss of the mixer requires additional circuits which can give an extra gain such as an RF buffer amplifier, and this can affects the linearity and stability of the overall systems. Therefore, it is necessary to maximize the conversion gain of the mixer. To maximize the conversion gain of the mixer, biases of the transistor were optimized, and output load impedance was optimized by the load-pull simulations. The designed mixer was fabricated in $0.1-{\mu}m$ GaAs pHEMT technology and verified by the measurements. The measurement results shows a maximum conversion gain of -4.7 dB at W-band and an input 1-dB compression point of 2.5 dBm.

Unequal Multi-Section Power Divider using CPW and Offset Coupled Transmission Lines (CPW와 Offset 결합 전송선로를 이용한 비대칭 다단 분배기)

  • Choi, Jong-Un;Yoon, Young-Chul;Sung, Gyu-Je;Kim, Young
    • Journal of Advanced Navigation Technology
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    • v.23 no.4
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    • pp.309-315
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    • 2019
  • This paper proposes an implementation of unequal power divider with 1:3 and 1:4 splitting ratio in multi-section structure using CPW and offset coupled transmission line. The power divider consists of a multi-section transmission line and a circuit with parallel capacitors and resistors. A multi-section transmission line was implemented by decomposing a ${\lambda}/4$ single transmission line terminated by an arbitrary impedance and converging it with a multi-section transmission line shorter than $90^{\circ}$ electrical length, and RC parallel circuits were connected between transmission lines to obtain reflection coefficient of output port and isolation characteristics between the output port. In this way, it was confirmed that the transmission lines at the unequal power divider designed at 2 GHz were shorter than ${\lambda}/4$ and implemented at least 27% less than the conventional ones, and that the broadband characteristics could be obtained.

Log Count Rate Circuits for Checking Electronic Cards in Low Frequency Band Reactor Power Monitoring (저주파수대의 원자로 출력신호 점검을 위한 대수 카운트레이트 회로)

  • Kim, Jong-ho;Che, Gyu-shik
    • Journal of Advanced Navigation Technology
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    • v.24 no.6
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    • pp.557-565
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    • 2020
  • In order for thermal degradationIn, excore nuclear flux monitoring system, as a monitoring and signal processing methodology of reactor power, monitors neutron pulses generated during nuclear fission as frequency status, and converts them into DC voltage, and then log values resultantly. The methods realy applied in the nuclear power plant are to construct combination of counters and flip-flops, or diodes and capacitors up to now. These methodes are reliable for relative high frequencies, while not credible for reasonable low frequencies or extreme low values. Therefore, we developed the circuit that converts frequencies into DC voltages, into and into log DC values in the wide range from low Hz to several hundred high kHz. We proved their validities through testing them using real data used in nuclear power plant and analyzed their results. And, these methods will be used to measure the neutron level of excore nuclear flux monitoring system in nuclear power plant.

Embedding Cobalt Into ZIF-67 to Obtain Cobalt-Nanoporous Carbon Composites as Electrode Materials for Lithium ion Battery

  • Zheng, Guoxu;Yin, Jinghua;Guo, Ziqiang;Tian, Shiyi;Yang, Xu
    • Journal of Electrochemical Science and Technology
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    • v.12 no.4
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    • pp.458-464
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    • 2021
  • Lithium ion batteries (LIBs) is a kind of rechargeable secondary battery, developed from lithium battery, lithium ions move between the positive and negative electrodes to realize the charging and discharging of external circuits. Zeolitic imidazolate frameworks (ZIFs) are porous crystalline materials in which organic imidazole esters are cross-linked to transition metals to form a framework structure. In this article, ZIF-67 is used as a sacrificial template to prepare nano porous carbon (NPC) coated cobalt nanoparticles. The final product Co/NPC composites with complete structure, regular morphology and uniform size were obtained by this method. The conductive network of cobalt and nitrogen doped carbon can shorten the lithium ion transport path and present high conductivity. In addition, amorphous carbon has more pores that can be fully in contact with the electrolyte during charging and discharging. At the same time, it also reduces the volume expansion during the cycle and slows down the rate of capacity attenuation caused by structure collapse. Co/NPC composites first discharge specific capacity up to 3115 mA h/g, under the current density of 200 mA/g, circular 200 reversible capacity as high as 751.1 mA h/g, and the excellent rate and resistance performance. The experimental results show that the Co/NPC composite material improves the electrical conductivity and electrochemical properties of the electrode. The cobalt based ZIF-67 as the precursor has opened the way for the design of highly performance electrodes for energy storage and electrochemical catalysis.