• Proceedings of the KIPE Conference
• /
• 2010.07a
• /
• pp.156-157
• /
• 2010

This paper proposes a correction method of capacitance estimation considering the temperature effect for the DC-link capacitor banks in three-phase AC/DC PWM converters. In this work, a sensing circuit using a temperature sensor is designed for measuring the operating temperature. Capacitance value is corrected considering the measured temperature. This method has been implemented in experiment.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2000.01a
• /
• pp.71-72
• /
• 2000

The design of large area thin film transistor liquid crystal displays (TFT-LCDs) requires consideration of cross-talks between the data lines and pixel electrodes. These limits are imposed by the mutual coupling capacitances present in a pixel. The mutual coupling capacitance causes a pixel voltage error. In this study, semi-empirical model, which is adopted from VLSI interconnection capacitance calculations, is used to calculate mutual coupling capacitances. With calculated mutual coupling capacitances and arbitrary given image pattern, the root mean square (RMS) voltage of pixel is calculated to see vertical cross-talk from the first to the last column. The information obtained this study can be utilized to design the larger area and finer image quality panel.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.20 no.2
• /
• pp.118-123
• /
• 2007

The purpose of this work was to investigate the design and fabrication process effects on electrical properties in high capacitance multilayer ceramic capacitor (MLCC) with nickel electrode. Dielectric breakdown voltage and insulation resistance value were decreased with increasing stack layer number, but dielectric constant and capacitance were increased. With increasing green sheet thickness, dielectric breakdown voltage, C-V and I-V properties were also increased. The major reasons of the effects were thought to be the defects generated extrinsically during fabrication process and interfacial reactions formed between nickel electrode and dielectric layer. These investigations clearly showed the influence of both green sheet thick ness and stack layer number on the electrical properties in fabricating the MLCC.

• KIEE International Transactions on Electrophysics and Applications
• /
• v.3C no.2
• /
• pp.55-58
• /
• 2003

This paper examines the electrical characteristic of single oxide layer due to various diffusion conditions, substrate orientations, substrate resistivity and gas atmosphere in a diffusion furnace. The oxide quality was examined through the capacitance-voltage characteristic due to the annealing time after oxidation process, and the capacitance-voltage characteristics of the single oxide layer by will be described via semiconductor device simulation.

• Journal of the Korean Geotechnical Society
• /
• v.22 no.7
• /
• pp.45-54
• /
• 2006

Resistivity cone penetrometer test (RCPT) can be employed at a relatively low cost for in-situ delineation of subsurface contamination. While the resistivity measurement has a potential to investigate the subsurface contamination, resistivity measurements alone will lead to some degree of ambiguity in the results. In this study, capacitance measurement was incorporated into the RCPT to overcome the ambiguity inherent in electrical resistivity measurements. This study is focused on verifying the applicability of resistivity and capacitance measurements of CPT module to provide information on subsurface contaminated by heavy metal and petroleum hydrocarbon. Laboratory model tests were performed to evaluate the sensitivity of the measured resistivity and relative capacitance on the water content and different types of contaminants. Test results show that simultaneous measurement of electrical resistivity and capacitance can give more reliable information on subsurface contamination. Electrical measurements of the CPT module showed high applicability to be used in detecting saturated soils contaminated by heavy metal and diesel plume floating above the groundwater table.

• Advances in aircraft and spacecraft science
• /
• v.5 no.4
• /
• pp.499-513
• /
• 2018

One of the major problems in glass fiber reinforced epoxy (GFRE) composite pipes is the durability under water absorption. This condition is generally recognized to cause degradations in strength and mechanical properties. Therefore, there is a need for an intelligent system for detecting the absorption rate and computing the mass of water absorption (M%) as a function of absorption time (t). The present work represents a new non-destructive evaluation (NDE) technique for detecting the water absorption rate by evaluating the dielectric properties of glass fiber and epoxy resin composite pipes subjected to internal hydrostatic pressure at room temperature. The variation in the dielectric signatures is employed to design an electrical capacitance sensor (ECS) with high sensitivity to detect such defects. ECS consists of twelve electrodes mounted on the outer surface of the pipe. Radius-electrode ratio is defined as the ratio of inner and outer radius of pipe. A finite element (FE) simulation model is developed to measure the capacitance values and node potential distribution of ECS electrodes on the basis of water absorption rate in the pipe material as a function of absorption time. The arrangements for positioning12-electrode sensor parameters such as capacitance, capacitance change and change rate of capacitance are analyzed by ANSYS and MATLAB to plot the mass of water absorption curve against absorption time (t). An analytical model based on a Fickian diffusion model is conducted to predict the saturation level of water absorption ($M_S$) from the obtained mass of water absorption curve. The FE results are in excellent agreement with the analytical results and experimental results available in the literature, thus, validating the accuracy and reliability of the proposed expert system.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.62 no.8
• /
• pp.1115-1119
• /
• 2013

The carbon nanotube/poly-vinylidene fluoride (CNT/PVDF) composite films for the use of electronic devices were fabricated by spray coating method using the CNT/PVDF solution, which was prepared by adding PVDF pellets into the CNT dispersed N-Methyl-2-pyrroli-done (NMP) solution. The CNT/PVDF composite films were peeled off from the glass substrate and were investigated by the scanning electron microscopy, which revealed that the CNTs were uniformly dispersed in the PVDF films and thickness of the films were approximately $20{\mu}m$. The capacitance of the CNT/PVDF films increased dramatically by adding CNTs into the PVDF matrix, and finally saturated approximately 1880 pF. However, the I-V curves didn't show any saturation effect in the CNT concentration range of 0 ~ 0.04 wt%. Therefore we can control the performance of the devices from the CNT/PVDF composite film by adjusting the current level resulted from the CNT concentration with the uniform capacitance value.

• Journal of IKEEE
• /
• v.28 no.2
• /
• pp.158-167
• /
• 2024

In this study, U-net model based on electrical capacitance is applied to monitor the condition inside the pipeline of semiconductor rear end process implemented in the numerical simulation. Capacitance values measured from electrodes attached to the pipeline is used as input data for the U-net network model and estimated permittivity distribution by the U-net model is used to reconstructed cross-sectional image at the pipeline. In the numerical simulation, images reconstructed by U-net model, Fully-connected neural network (FCNN) model and Newton-Raphson method are compared for evaluation. U-net model shows good results as compared to other models.

• Journal of IKEEE
• /
• v.16 no.4
• /
• pp.283-289
• /
• 2012

In this paper, We proposed Separate Gate Technique(SGT) to improve the switching characteristics of Trench power MOSFET. Low gate-to-drain 전하 (Miller 전하 : Qgd) has to be achieved to improve the switching characteristics of Trench power MOSFET. A thin poly-silicon deposition is processed to form side wall which is used as gate and thus, it has thinner gate compared to the gate of conventional Trench MOSFET. The reduction of the overlapped area between the gate and the drain decreases the overlapped charge, and the performance of the proposed device is compared to the conventional Trench MOSFET using Silvaco T-CAD. Ciss(input capacitance : Cgs+Cgd), Coss(output capacitance : Cgd+Cds) and Crss(reverse recovery capacitance : Cgd) are reduced to 14.3%, 23% and 30% respectively. To confirm the reduction effect of capacitance, the characteristics of inverter circuit is comprised. Consequently, the reverse recovery time is reduced by 28%. The proposed device can be fabricated with convetional processes without any electrical property degradation compare to conventional device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1995.05a
• /
• pp.9-13
• /
• 1995

The effect of WO$_3$ addition and sintering condition on the electrical properties of SrTiO$_3$ceramic have been investigated. Resistivity and capacitance of grains and grain boundaries were obtained by applying impedance spectroscopy. From the result it could be concluded that the temperature dependance of capacitance of WO$_3$doped specimens were influenced directly by the variation of grain boundary capacitance. It was also found that the dispersion frequency increased as the degree of reduction of the specimen increased. The dispersion frequency characteristics showed discernably that the resistivity of the specimen varied with WO$_3$ content. The dielectric properties were influenced directly by the reduction of the specimens. The dielectric constant of grain boundaries of BL capacitor could be obtained by Cole-Cole plot and was influeneced by the amount of WO$_3$ added.