• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.760-763
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• 2003

Low Temperature Cofired Ceramics (LTCC) technology is a promising technology to integrate many devices in a module by embedding passive components. For the module substrate, most LTCC structures have dielectric constants below 10 to reduce signal delay time. Some components, which need high dielectric constants, have not been yet embedded in LTCC module. So, embedding capacitor with high capacitance by applying another dielectrics with high dielectric constants in LTCC is an important issue to maximize circuit density in LTCC module. In this study, electrical properties of embedded capacitor fabricated by dielectric paste of high dielectric constants (K-100) and co-firing behavior with LTCC were investigated. To prevent camber development of co-fired structure, constrained sintering process was tested. Dielectric properties of embedded capacitors were calculated from their capacitance and impedance value. Temperature coefficient of capacitance were also measured.

• Journal of Power Electronics
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• v.7 no.1
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• pp.38-43
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• 2007

An External Electrode Fluorescent Lamp (EEFL) has longer lifespan, higher power efficiency and higher luminance than a Cold Cathode Fluorescent Lamp (CCFL). Moreover, it is easy to drive them in parallel. Therefore, the EEFL is expected to quickly replace the CCFL in LCD backlight systems. However, the EEFL has more complex characteristics than the CCFL with a resistive component, because it has both a resistive component by plasma and a capacitive component by external electrode. In this paper, values of resistance and capacitance are measured at several power levels and at several operating frequencies. They are expressed by a numeral formula based on a linear approximation that represents the equivalent resistance and capacitance as a function of power. Then we made block diagram of the equivalent circuit model using numerical expressions. Simulation waveforms and experimental results are presented to verify the feasibility of the equivalent model.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.29 no.1 s.232
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• pp.87-94
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• 2005

A computer code for Electrical Capacitance Tomography (ECT) is developed to sense the cross sectional phase distribution of two-phase flow in the rectangular pipe in which the tomography sensor furnished by the insulated wall, electrodes, and electric field screen. The computer code had two steps for the image reconstruction. In the forward projection step, the sensitivity matrix was constructed based on the electric field calculated by the finite difference method. In the backward projection step, the sensitivity matrix and the measured capacitances were used to reconstruct the cross sectional image. Several algorithms including LBP, TR, ITR, and PLI were employed to find the proper one for the two-phase flow analysis. Since the dielectric constant of the water in two-phase flow is sensitive to the thermal parameter such as, temperature and pressure, the developed code was evaluated to find their accuracy, speed of calculation, and sensitivity to the variation of the dielectric constant. It was found that the iterative methods are superior to the direct methods for the image reconstruction, and the PLI method was the best in the variation of the dielectric constants.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.251-263
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• 2008

In this paper, we report an analytical modeling and 2-D Synopsys Sentaurus TCAD simulation of ion implanted silicon carbide MESFETs. The model has been developed to obtain the threshold voltage, drain-source current, intrinsic parameters such as, gate capacitance, drain-source resistance and transconductance considering different fabrication parameters such as ion dose, ion energy, ion range and annealing effect parameters. The model is useful in determining the ion implantation fabrication parameters from the optimization of the active implanted channel thickness for different ion doses resulting in the desired pinch off voltage needed for high drain current and high breakdown voltage. The drain current of approximately 10 A obtained from the analytical model agrees well with that of the Synopsys Sentaurus TCAD simulation and the breakdown voltage approximately 85 V obtained from the TCAD simulation agrees well with published experimental results. The gate-to-source capacitance and gate-to-drain capacitance, drain-source resistance and trans-conductance were studied to understand the device frequency response. Cut off and maximum frequencies of approximately 10 GHz and 29 GHz respectively were obtained from Sentaurus TCAD and verified by the Smith's chart.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.1
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• pp.41-47
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• 1998

The (Sr$_1$-\ulcorner.Ca\ulcorner)TiO$_3$(0.05 x 0.2) ceramics were fabricated to form semiconducting ceramics by sintering at about 1350[$^{\circ}C$] in a reducing atmosphere($N_2$gas). After being fired in a reducing atmosphere, metal oxides(CuO) was painted on the both surface of the specimens to diffuse to the grain boundary. The capacitance changes slowly and almost linearly in the temperature region of -40~+85[$^{\circ}C$]. The capacitance characteristics appears a stable value within $\pm$10[%]. According to increase of the frequency as a functional of temperature, all specimens used in this study showed the dielectric relaxation, and the relaxation frequency was above 10\ulcorner[Hz]. The capacitance is almost unchanged below about 20[V] but it decrease slowly over 20[V]. The voltage-current characteristics of specimens observed in the temperature range of 25~125[$^{\circ}C$] as the current increased appears that it is due to space charge condensed to interface between grain and grain boundary.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.44 no.12
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• pp.1610-1616
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• 1995

The (Sr$_{1-x}$ .Ca$_{x}$)TiO$_{3}$(0.05.leq.x.leq.0.2) ceramics were fabricated to form semiconducting ceramics by sintering at about 1350[.deg. C] in a reducing atmosphere (N$_{2}$ gas). After being fired in a reducing atmosphere, metal oxides, CuO, was painted on the both surface of the specimens to diffuse to the grain boundary. They were annealed at 1100[.deg. C] for 2 hours. The 2nd phase formed by thermal diffusing from the surface lead to a very high apparent dielectric constant. The results of the capacitance-valtage measurements indicated that the grain boundary was composed of the continuous insulating layers. The capacitance is almost unchanged below about 20[V], but decreased slowly over 20[V]. The conduction mechanism of the specimens observed in the temperature range of 25~125[.deg. C], and is divided into three regions having different mechanism as the current increased: the region I below 200[V/cm] shows the ohmic conduction. The region II between 200[V/cm] and 2000[V/cm] can be explained by the Poole-Frenkel emission theory, and the region III above 2000[V/cm] is dominated by the tunneling effect.ct.

• Journal of Power Electronics
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• v.18 no.1
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• pp.116-128
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• 2018

Conventionally, in order to reduce the ac components of the dc-link capacitors of the two-level Half-Bridge Voltage Source Inverter (HB-VSI), high dc-link capacitances are required. This necessitates the employment of short-lifetime and bulky electrolytic capacitors. In this paper, an analysis for the performance of low dc-link capacitances-based HB-VSI is presented to elucidate its ability to generate an enhanced fundamental output voltage magnitude without increasing the voltage rating of the involved switches. This feature is constrained by the load displacement factor. The introduced enhancement is due to the ac components of the capacitors' voltages. The presented approach can be employed for multi-phase systems through using multi single-phase HB-VSI(s). Mathematical analysis of the proposed approach is presented in this paper. To ensure a successful operation of the proposed approach, a closed loop current controller is examined. An expression for the critical dc-link capacitance, which is the lowest dc-link capacitance that can be employed for unipolar capacitors' voltages, is derived. Finally, simulation and experimental results are presented to validate the proposed claims.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.10
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• pp.687-692
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• 1999

A new technique to measure low level capacitance variations of the gyroscope is proposed and verified by computer simulation. It is based on the new CV(capacitance-voltage) converter circuit biased by dc current source and the peak detector without low pass filter. The CV converter biased by dc current source provides good signal-to-noise ratio and this setup of the detection circuitry without low pass filter makes it possible to provide short settling time, that is, higher speed of measurement and wide operation range if only a few parameters are adjusted. The key parameters that affect the performance of the detection circuitry are illustrated and computer simulation results are presented. The demonstrated detection circuitry shows linear response from 10 fF to 130 fF at 10 kHz and shows good linearity.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.73-73
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• 2009

In this paper, electrical properties in $ZrO_2$-based high-k metal MIM capacitors were studied. Linear voltage coefficient of capacitance (VCC) was 72.375 ppm/V, quadratic VCC was $174.581ppm/V^2$, temperature coefficients of capacitance was $111.01ppm/^{\circ}C$ at 100kHz and $89.497ppm/^{\circ}C$ at 1MHz, which indicate the temperature dependence of electrical parameter for MIM capacitors.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.63-66
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• 2003

In this paper, the electrical characteristics of single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of poly backseat was researched. The oxide quality was examined through capacitance-voltage characteristics, and besides, it will be describe the capacitance-voltage characteristics of the single oxide layer by semiconductor device simulation.