• Journal of Power Electronics
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• v.13 no.2
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• pp.177-185
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• 2013

This paper studies a soft switching DC/DC converter to achieve zero voltage switching (ZVS) for all switches under a wide range of load condition and input voltage. Two three-level PWM circuits with the same power switches are adopted to reduce the voltage stress of MOSFETs at $V_{in}/2$ and achieve load current sharing. Thus, the current stress and power rating of power semiconductors at the secondary side are reduced. The series-connected transformers are adopted in each three-level circuit. Each transformer can be operated as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer from the input side to the output side. Therefore, no output inductor is needed at the secondary side. Two center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Due to the resonant behavior by the resonant inductance and resonant capacitance at the transition interval, all switches are turned on at ZVS. Experiments based on a 1kW prototype are provided to verify the performance of proposed converter.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.841-844
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• 2005

Multi-output VC-TCXO (Voltage Controlled-Temperature Compensated Crystal Oscillator) for WCDMA has integrated the additional CMOS inverter, so it can be normal clipped sinewave output and additional CMOS output and it can be satisfied the VC-TCXO Characteristics that WCDMA system required. In this paper, however 26MHz is used for reference frequency, similarly and practically, it is usable from 10MHz to 40MHz, Most important factor to integrate CMOS inverter internally is the isolation between normal output and additional output. For this, it is separated in package design, due to this, when it isn't used additional output, it shows the same electrical performance, when it is used additional output, it has minimum-rized the interference. and then the important characteristics in reference oscillator are met to WCDMA system's requirements, like phase noise and frequency short term stability.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.1
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• pp.42-46
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• 2014

A modified network to suppress the nth harmonics in a Wilkinson power divider is presented. The solution has been found by adding transmission lines, whose electrical lengths are determined by using the suppression terms, between two transformers of the traditional design. Experimental results show the second and third harmonics levels achieved are -45.3 and -46.4 dB, respectively, while the performance of the power divider at the fundamental frequency is maintained.

• Proceedings of the KIEE Conference
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• 2006.04b
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• pp.211-215
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• 2006

This paper present the Half-Bridge converter for low current output. In converter system, magnetic components are important devices used for energy storage, energy transfer, galvanic isolation and filtering. The proposed Half-Bridge converter is to reduce the number of magnetic components. The secondary rectification was discussed by comparison of center-tap type with primary center-core transformer winding and primary side-core transformer winding. A prototype featuring 400V input, 10V output, 400kHz switching frequency, and 100W output power.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.576-580
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• 2001

This paper presents a casca multilevel PWM rectifier without the isolation transformers for energy build-up at each inverter modules; The features and advantages of the proposed PWM rectifier can be summarized as follows; 1) It realizes the high power high voltage AC/DC power conversion, 2) It uses no transformer which is bulky and heavy, 3) It has hybrid structure so that switching devices can be effectively utilized, 4) It produces high quality AC current even in high power high voltage applications, 5) The input power factor remains unity by simple modulation index control. The multilevel rectifier is analyzed by using the circuit DQ transformation whereby the characteristics and control equations are obtained. Finally, it will be shown that the system simulation reveals the validity of analyses

• ETRI Journal
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• v.30 no.2
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• pp.249-254
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• 2008

In this paper, we demonstrate an electrically band-limited carrier-suppressed return-to-zero (EB-CSRZ) signal generator operating up to a 10 Gbps data rate comprising a single-stage Mach-Zehnder modulator and a wideband signal mixer. The wideband signal mixer comprises inverter stages, a mixing stage, and a gain amplifier. It is implemented by using a 0.13 ${\mu}m$ CMOS technology. Its transmission response shows a frequency range from DC to 6.4 GHz, and the isolation response between data and clock signals is about 21 dB at 6.4 GHz. Experimental results show optical spectral narrowing due to incorporating an electrical band-limiting filter and some waveform distortion due to bandwidth limitation by the filter. At 10 Gbps transmission, the chromatic dispersion tolerance of the EB-CSRZ signal is better than that of NRZ-modulated signal in single-mode fiber.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.152-153
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• 2011

원자력발전소(원전) 터빈발전기에서 생산된 전력은 송전망과 발전소 운전에 필요한 기기 작동을 위해 소내로 공급되도록 설계되어 있다. 최근 신규원전의 전원 공급을 위해 가동중 원전의 송전선로 휴전 작업시 운영기술지침서의 운전제한시간을 초과한 휴전작업에 대한 안전성 문제가 대두되었다. 본 논문에서는 정상운전중인 원전의 송전선로 1개 휴전 작업중 운전중인 송전선로 상실시 리스크를 분석하여 허용기준 만족 여부를 평가하고, 리스크관리 대책을 수립하여 전력계통의 신뢰성 및 안전성 향상에 기여하고자 한다.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.2025-2026
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• 2011

위성의 가장 큰 제한 중에 하나는 발사하면 더 이상의 수리가 불가능하다는 것이다. 그래서 사용하는 위성의 부품 및 시스템에 대하여 신뢰성 검증이 지상에서 많이 이루지고 있지만 모든 고장을 막을 수 있는 것은 불가능함으로 이에 대한 감시 및 고장시 대처하는 기능이 필요하다. 위성의 고장운영(fault management)은 탑재소프트웨어나 하드웨어로 구현하여 운영 중 시스템의 이상상황(anomaly)을 모니터링하고 이상상황이 발생한 경우 시스템이 안전하도록 조치하는 것이다. 본 논문은 천리안위성의 FDIR구조를 소개하였고 탑재체접속장치 경우 설계된 FDIR를 분석하였다.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.568-572
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• 1994

This paper presents equipment for charging and discharging with high power factor aid high efficiency. This equipment is consisted of $3{\phi}$SPWM AC/DC converter for improving input current waveform and input power factor, and bidirectional DC/DC converter for electric isolation in the DC link Part. Therefore, Input power factor and the total efficiency in the proposed system can be increased more than in the conventional phase-controlled thyristor Charging - Discharging System.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2000.11a
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• pp.17-20
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• 2000

This study is about a retrograde triple well employed in the Cell tr. of next DRAM and flash memory. triple well structure is formed deep n-well under the light p-well using MeV ion implantation. MeV P implanted deep n-well was observed to show greatly improved characteristics of electrical isolation and soft error. Junction leakage current, however, showed a critical behavior as a function of implantation and annealing conditions. {311} defects were observed to be responsible for the leakage current. {311} defects were generated near the R$\sub$p/ (projected range) region and grown upward to the surface during annealing. This is study on the defect behavior in device region as a function of implantation and annealing conditions.