• Title/Summary/Keyword: ECRL

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A Low Power 16-Bit RISC Microprocessor Using ECRL Circuits

  • Shin, Young-Joon;Lee, Chan-Ho;Moon, Yong
    • ETRI Journal
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    • v.26 no.6
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    • pp.513-519
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    • 2004
  • This paper presents a low power 16-bit adiabatic reduced instruction set computer (RISC) microprocessor with efficient charge recovery logic (ECRL) registers. The processor consists of registers, a control block, a register file, a program counter, and an arithmetic and logical unit (ALU). Adiabatic circuits based on ECRL are designed using a $0.35{\mu}m$ CMOS technology. An adiabatic latch based on ECRL is proposed for signal interfaces for the first time, and an efficient four-phase supply clock generator is designed to provide power for the adiabatic processor. A static CMOS processor with the same architecture is designed to compare the energy consumption of adiabatic and non-adiabatic microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is about 1/3 compared to that of the static CMOS microprocessor.

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The Influence of the Pattern of Gripping the Ultrasound Head on the Activity of Upper Limb Muscles (초음파 도자를 쥐는 방법이 팔 근육의 근활성도에 미치는 영향)

  • Choi, Seok-Ho;Yi, Chung-Hwi;Jeon, Hye-Sun;Lee, Jeong-Weon
    • Physical Therapy Korea
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    • v.20 no.2
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    • pp.28-37
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    • 2013
  • This study examined differences in the activity of upper limb muscles according to how an ultrasound head is gripped. Twenty-two adult males were participated in the study. Each participant was asked to apply ultrasound treatment on to a lump of pork meat by two different ultrasound head grip patterns: spherical and cylindrical grips. Muscle activity was measured in the extensor carpi radialis longus (ECRL), flexor carpi ulnaris (FCU), and pronator teres (PT), triceps brachii (TB), middle deltoid (MD), and upper trapezius (UT) muscles. There were no significant differences in the EMG signals of any muscle according to the ultrasound head grip pattern (p>.05). There were significant differences in the EMG signal of each type of muscle (p<.05). The EMG signal of UT was the lowest and that of TB was lower than ECRL and FCU. There were interactions between ECRL and FCU, between ECRL and PT, between FCU and ECRL, and between FCU and MD. The EMG signal of ECRL using the cylindrical head was low and that of FCU with the cylindrical head was high, while the opposite was the case with the spherical head ($p_{adj}$ <.05/15). The results of this study indicate that the wrist muscles worked actively when the participants applied ultrasound therapy using both spherical and cylindrical heads. A spherical head might induce imbalanced muscle activity among the wrist muscles, leading to deviation of the wrist joint. Therefore, the cylindrical head is recommended for ultrasound therapy because it produced a constant, repeated force.

A Design of 16-bit Adiabatic Low-Power Microprocessor (단열회로를 이용한 16-bit 저전력 마이크로프로세서의 설계)

  • Shin, Young-Joon;Lee, Byung-Hoon;Lee, Chan-Ho;Moon, Yong
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.6
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    • pp.31-38
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    • 2003
  • A 16-bit adiabatic low-power Microprocessor is designed. The processor consists of control block, multi-port register file, program counter, and ALU. An efficient four-phase clock generator is also designed to provide power clocks for adiabatic processor. Adiabatic circuits based on efficient charge recovery logic(ECRL), are designed 0.35,${\mu}{\textrm}{m}$ CMOS technology. Conventional CMOS processor is also designed to compare the energy consumption of microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is reduced by a factor of 2.9∼3.1 compared to that of conventional CMOS microprocessor.

A design of 16-bit adiabatic Microprocessor core

  • Youngjoon Shin;Lee, Hanseung;Yong Moon;Lee, Chanho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.4
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    • pp.194-198
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    • 2003
  • A 16-bit adiabatic low-power Micro-processor core is designed. The processor consists of control block, multi-port register file and ALU. A simplified four-phase clock generator is designed to provide supply clocks for adiabatic processor. All the clock line charge on the capacitive interconnections is recovered to recycle the energy. Adiabatic circuits are designed based on ECRL(efficient charge recovery logic) and $0.35\mu\textrm$ CMOS technology is used. Simulation results show that the power consumption of the adiabatic Microprocessor core is reduced by a factor of 2.9~3.1 compared to that of conventional CMOS Microprocessor

A Design and Implementation of 16-bit Adiabatic ALU for Micro-Power Processor (초저전력 프로세서용 16-bit 단열 ALU의 설계 및 구현)

  • Lee, Han-Seung;Na, In-Ho;Moon, Yong;Lee, Chan-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.3
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    • pp.101-108
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    • 2004
  • A 16-bit adiabatic ALU(arithmetic logic unit) is designed. A simplified four-phase clock generator is also designed to provide supply clocks for the adiabatic circuits. All the clock line charge on the capacitive interconnections is recovered to recycle energy. Adiabatic circuits are designed based on ECRL (efficient charge recovery logic) using a 0.35${\mu}{\textrm}{m}$ CMOS technology. The post-layout simulation results show that the power consumption of the adiabatic ALU including supply clock generator is reduced by a factor of 1.15-1.77 compared to the conventional CMOS ALU with the same structure.

Comparison of Upper Extremity Muscle Activity between Stroke Patients and Healthy Participants while Performing Bimanual Tasks

  • Namwoo Kim;Sungbae Jo;Kyeong Bae;Changho Song
    • Physical Therapy Rehabilitation Science
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    • v.11 no.4
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    • pp.526-534
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    • 2022
  • Objective: The purpose of this study was to compare muscle activities of stroke patients and healthy participants during bimanual tasks. Design: A cross sectional study. Methods: A total of 25 participants (13 hemiparetic stroke patients and 12 healthy participants) were recruited. The muscle activities using electromyogram (EMG) during bimanual tasks were collected from the following muscles: extensor carpi radialis longus (ECRL), biceps brachii (BB), and triceps brachii (TB). The bimanual tasks included eight tasks consisted of (1) raising the wrists up and down, (2) supinating and pronating the palms, (3) touching the shoulder with fingertips, (4) drawing vertical dot, (5) reaching for a cup and bring it in to drink, (6) drawing a circle outward and (7) inward, and (8) grasping the fingers. The EMG data collected from the muscles of paretic and non-paretic sides of stroke patients and the average from both sides of healthy subjects were normalized and compared after calculating the percentage of maximal isometric voluntary contraction. Results: The ECRL, BB and TB of the paretic side of the stroke patients showed relatively greater muscle activity compared to the non-paretic side as well asaverage of the healthy subject duringall tasks (p<0.05). In addition, the ECRL showed the highest muscle activity during most of the tasks. All of the non-paretic side musclesfrom stroke patients showed higher muscle activity compared to those of healthy subjects. Conclusions: The current study showed that muscle activities of upper extremity varied between paretic and non-paretic sides of stroke patients during bimanual tasks. Interestingly, the non-paretic side muscle activities were also different from those of normal participants.

A Study of an 8-b${\times}$8-b Adiabatic Pipelined Multiplier with Simplified Supply Clock Generator (단열회로를 이용한 8-b${\times}$8-b 파이프라인 승산기와 개선된 전원클럭 발생기의 연구)

  • Moon, Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.4
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    • pp.285-291
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    • 2001
  • An 8-b$\times$8-b adiabatic pipelined multiplier is designed. Simplified four phase clock generator is also designed to provide supply clocks for adiabatic circuits. All the clock line charge on the capacitive interconnections is recovered to save energy. Adiabatic circuits are designed based on ECRL(efficient charge recovery logic) and are integrated using 0.6${\mu}{\textrm}{m}$ CMOS technology. The efficiency of proposed supply clock generator is better than the previous one by 4~11%. Simulation results show that the power consumption of adiabatic pipelined multiplier is reduced by a factor of 2.6~3.5 compared to a conventional pipelined CMOS multiplier.

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A Study of an 8-b*8-b adiabatic pipelined multiplier with simplified supply clock generator (단열 회로를 이용한 8-b*8-b 파이프라인 승산기와 개선된 전원 클럭 발생기의 연구)

  • Mun, Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.4
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    • pp.43-43
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    • 2001
  • 단열회로를 이용한 8-b×8-b 파이프라인 승산기와 4가지 위상을 가지는 전원클럭을 공급하기 위한 개선 된 구조의 전원클럭 발생기를 설계하였다. 전원클럭 신호선의 전하는 복원되어 에너지 소모를 줄인다. 단열회로는 ECRL 형태를 기본으로 하였으며 0.6㎛ CMOS 공정을 사용하여 설계하였다. 개선된 전원클럭 발생기는 기존회로보다 4∼11% 정도 효율이 높았다. 모의실험결과 제안하는 단열회로 승산기는 CMOS 승산기보다 2.6∼3.5배 정도의 에너지를 감소시켰다.

The Feedback Mirror Therapy in Stroke Patients Effect of Muscle Activity and Function of the Upper Extremity (거울되먹임 융합 치료가 뇌졸중 환자의 상지 근활성도와 상지 기능에 미치는 영향)

  • Uhm, Yo-Han
    • Journal of Digital Convergence
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    • v.13 no.6
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    • pp.205-212
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    • 2015
  • The purpose of this study was to find out the effect that muscle activity of upper extremity and functional test in the case of the stroke patient by using the feedback mirror therapy. Sixteen subjects were recruited and randomly divided into two groups. one group was trained feedback mirror therapy and other group was action observation training. This process was carried out five times a week for eight weeks. To upper extremity test was used to MFT, FMA and in order to test UT, DM, BB, FCR, ECRL used to muscle activity. After the training, exclude FCR an upper extremity motor function of target showed significant difference between two groups and especially an experimental group showed significant muscle activity and MFT, FMA score improvement of UT, DM, BB, ECRL. Therefore, feedback mirror therapy is more upper extremity motor function and muscle activity improvement effect than action observation training.

A 16-bit adiabatic macro blocks with supply clock generator for micro-power RISC datapath

  • Lee, Hanseung;Inho Na;Lee, Chanho;Yong Moon
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1563-1566
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    • 2002
  • A 16-bit adiabatic datapath for micro-power RISC processor is designed. The datapath is composed of a 3-read and 1-write multi-port adiabatic register file and an arithmetic and logic unit. A four-phase clock generator is also designed to provide supply clocks fer adiabatic circuits and the driving capability control scheme is proposed. All the clock line charge on the capacitive interconnections is recovered to recycle energy. Adiabatic circuits are designed based on efficient charge recovery logic(ECRL) and are implemented using a 0.35 fm CMOS technology. Functional and energy simulation is carried out to show the feasibility of adiabatic datapath. Simulation results show that the power consumption of the adiabatic datapath including supply clock generator is reduced by a factor of 1.4∼1.5 compared to that of the conventional CMOS.

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