• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.403-408
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• 2008

In this paper, the high efficiency and linearity Doherty power amplifier using DGS and adaptive bias technique has been designed and realized for 2.3GHz WiBro applications. The Doherty amplifier has been implemented us-ing silicon MRF 281 LDMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with DGS and adaptive bias technique has been 36.6% at 34.01dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.1
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• pp.47-52
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• 2012

A power amplifier is one of important factors for basestation's efficiency and the researches for efficency enhancement focus Doherty amplifier structure with GaN power devices in these days. A memory effect of Doherty amplifier affect operation characteristics for linearity and efficiency. This paper reports on electrothermal nonlinearity modeling and compensation for GaN Doherty amplifier's distortion. Also this paper reports on the dynamic expression of the instantaneous junction temperature as a function of the instantaneous dissipated power. We design distortion model for GaN Doherty amplifier and predistortion compensator for electrothermal memory effect from the proposed behavior model parameters. The simulations was evaluated by ADS Tools and GaN Doherty amplifier with 37dBm. The GaN Doherty amplifier with compensator enhanced about 16dB than without electrothemal memory effect compensator in 2-tone output spectrum.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.5 s.347
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• pp.128-136
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• 2006

In this paper, design and implement 50W Doherty power amplifiers for 3GPP repeater and base station transceiver system. Efficiency improvement and high power property of ideal Doherty power amplifier is distinguishable; however bias control for implementation of Doherty(GDCHD) amplifier is difficult. To solve the problem, therefore, GDCHD(Gate and Drain Control Hybrid Doherty) power amplifier is embodied to drain bias adjustment circuit to Doherty power amplifier with gate bias adjustment circuit. Experiment result shows that $2.11{\sim}2.17\;GHz$, 3GPP operating frequency band, with 57.03 dB gain, PEP output is 50.30 dBm, W-CDMA average power is 47.01 dBm, and -40.45 dBc ACLR characteristic in 5MHz offset frequency band. Each of the parameter satisfied amplifier specification which we want to design. Especially, GDCHD power amplifier shows proper efficiency performance improvement in uniformity ACLR than Doherty power amplifier.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.4
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• pp.65-71
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• 2007

Doherty amplifier has more efficiency and distortion than general amplifier. These distortion classified amplitude distortion and phase distortion, memory effect distortion. This paper reports on an attempt to investigate, model and quantity the contribution of the electrical nonlinearity effects and the thermal memory effects to a doherty amplifier's distortion generation and suggests thermal memory effect compensator for pre-distorter. Also this paper reports on the development of an accurate dynamic expression of the instantaneous junction temperature as a function of the instantaneous dissipated power. The parameters of suggested model suppress thermal memory effects doherty amplifier with pre-distorter. Pre-distorter with electrothermal memory effect compensator for doherty amplifier enhanced ACLR performance about 22 dB than general doherty amplifier. Experiment results were mesured by 50W LDMOS Doherty amplifier and pre-distorter with electrothermal memory effect compensator was simulated by ADS.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.10 no.5
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• pp.99-104
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• 2011

This paper presents a high power and high efficiency unbalanced Doherty power amplifier used to extend the output power back-off (OPBO). The proposed unbalanced amplifier uses the same type of transistors in both the main amplifier and the peaking amplifier, similar to a conventional symmetric Doherty amplifier. The unbalanced amplifier can have the impedance of a ${\lambda}/4$ transformer located at the output of the main amplifier modified. This enables the OPBO to exceed 6 dB, the maximum OPBO for a conventional symmetric Doherty amplifier. The efficiency and linearity performance of the unbalanced Doherty amplifier are almost same as those found for the asymmetric Doherty amplifier, even though the unbalanced Doherty amplifier structure is simpler than the asymmetric Doherty structure. In order to verify the proposed amplifier performance, a 46 W Doherty amplifier has been both simulated and measured using a CDMA2000 1FA signal. From the measured results, the proposed unbalanced Doherty amplifier achieved an added power efficiency of 38 % and an adjacent channel power ratio of -34 dBc at a 885 kHz offset frequency and -35.6 dBc at a 1.98 MHz offset frequency.

• Journal of Navigation and Port Research
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• v.30 no.5 s.111
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• pp.351-356
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• 2006

In this paper, the high efficiency Doherty power amplifier has been designed and realized for microwave applications. The Doherty amplifier has been implemented using silicon MRF 281 LDMOS FET. The RF performances cf the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone. The realized Doherty power amplifier P1dB output power has 33dBm at 2.3GHz frequency. Also the Doherty power amplifier shows 11dB gain and -17.8dB input return loss at 2.3GHz to 2.4GHz. The designed Doherty amplifier has been improved the average PAE by 10% higher efficiency than a class AB amplifier alone. The Maximum PAE of designed Doherty power amplifier has been 39%.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2006.06b
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• pp.91-96
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• 2006

In this paper, the high efficiency Doherty power amplifier has been designed and realized for microwave applications. The Doherty amplifier has been implemented using silicon MRF 281 LOMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias..tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone. The realized Doherty power amplifier PldB output power has 33dBm at 2.3GHz frequency. Also the Doherty power amplifier shows 11dB gain and -17.8dB input return loss at 2.3GHz to 2.4GHz. The designed Doherty amplifier has been improved the average PAE by 10% higher efficiency than a class AB amplifier alone. The Maximum PAE of designed Doherty power amplifier has been 39%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.8 s.99
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• pp.777-782
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• 2005

In this paper, adaptive bias circuit and PBG structure have been employed to suppress IMD(Inter-Modulation Distortion) and improve PAE(Power Added Efficiency) of the Doherty amplifier. Gate bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed power amplifier using adaptive bias circuit and PBG has been improved the $IMD_3$ by 7.5 dBc, and the average PAR by $12\%$, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.2 s.332
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• pp.81-86
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• 2005

In this paper, the high linear Doherty amplifier has been realized by employing the PBG(Photonic Band Gap) structure. The PBG structure has been employed on the output matching network of the power amplifier. The proposed Doherty amplifier has been improved in PAE and IMD. The PAE has been $36.4\%$ and the IMD has been -24.5 dBc, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.707-712
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• 2006

In this paper, dual bias control circuit and PBG(Photonic BandGap) structure have been employed to improve PAE(Power Added Effciency) of the Doherty amplifier on Input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed Doherty amplifier using dual bias controlled circuit and PBG has been improved the average PAE by 8%, $IMD_3$ by -5 dBc. And proposed Doherty amplifier has a high efficiency more than 30% on overall input power level, respectively.