• Title/Summary/Keyword: Digital noise

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Eyelid Detection Algorithm Based on Parabolic Hough Transform for Iris Recognition (홍채 인식을 위한 포물 허프 변환 기반 눈꺼풀 영역 검출 알고리즘)

  • Jang, Young-Kyoon;Kang, Byung-Jun;Park, Kang-Ryoung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.1
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    • pp.94-104
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    • 2007
  • Iris recognition is biometric technology which uses a unique iris pattern of user in order to identify person. In the captured iris image by conventional iris recognition camera, it is often the case with eyelid occlusion, which covers iris information. The eyelids are unnecessary information that causes bad recognition performance, so this paper proposes robust algorithm in order to detect eyelid. This research has following three advantages compared to previous works. First, we remove the detected eyelash and specular reflection by linear interpolation method because they act as noise factors when locating eyelid. Second, we detect the candidate points of eyelid by using mask in limited eyelid searching area, which is determined by searching the cross position of eyelid and the outer boundary of iris. And our proposed algorithm detects eyelid by using parabolic hough transform based on the detected candidate points. Third, there have been many researches to detect eyelid, but they did not consider the rotation of eyelid in an iris image. Whereas, we consider the rotation factor in parabolic hough transform to overcome such problem. We tested our algorithm with CASIA Database. As the experimental results, the detection accuracy were 90.82% and 96.47% in case of detecting upper and lower eyelid, respectively.

Real-time Moving Object Recognition and Tracking Using The Wavelet-based Neural Network and Invariant Moments (웨이블릿 기반의 신경망과 불변 모멘트를 이용한 실시간 이동물체 인식 및 추적 방법)

  • Kim, Jong-Bae
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.45 no.4
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    • pp.10-21
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    • 2008
  • The present paper propose a real-time moving object recognition and tracking method using the wavelet-based neural network and invariant moments. Candidate moving region detection phase which is the first step of the proposed method detects the candidate regions where a pixel value changes occur due to object movement based on the difference image analysis between continued two image frames. The object recognition phase which is second step of proposed method recognizes the vehicle regions from the detected candidate regions using wavelet neurual-network. From object tracking Phase which is third step the recognized vehicle regions tracks using matching methods of wavelet invariant moments bases to recognized object. To detect a moving object from image sequence the candidate regions detection phase uses an adaptive thresholding method between previous image and current image as result it was robust surroundings environmental change and moving object detections were possible. And by using wavelet features to recognize and tracking of vehicle, the proposed method decrease calculation time and not only it will be able to minimize the effect in compliance with noise of road image, vehicle recognition accuracy became improved. The result which it experiments from the image which it acquires from the general road image sequence and vehicle detection rate is 92.8%, the computing time per frame is 0.24 seconds. The proposed method can be efficiently apply to a real-time intelligence road traffic surveillance system.

A CMOS Fractional-N Frequency Synthesizer for DTV Tuners (DTV 튜너를 위한 CMOS Fractional-N 주파수합성기)

  • Ko, Seung-O;Seo, Hee-Teak;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of IKEEE
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    • v.14 no.1
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    • pp.65-74
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    • 2010
  • The Digital TV(DTV) standard has ushered in a new era in TV broadcasting and raised a great demand for DTV tuners. There are many challenges in designing a DTV tuner, of which the most difficult part is the frequency synthesizer. This paper presents the design of a frequency synthesizer for DTV Tuners in a $0.18{\mu}m$ CMOS process. It satisfies the DTV(ATSC) frequency band(54~806MHz). A scheme is proposed to cover the full band using only one VCO. The VCO has been designed to operate at 1.6~3.6GHz band such that the LO pulling effect is minimized, and reliable broadband characteristics have been achieved by reducing the variations of VCO gain and frequency step. The simulation results show that the designed VCO has gains of 59~94MHz(${\pm}$17.7MHz/V,${\pm}$23%) and frequency steps of 26~42.5MHz(${\pm}$8.25MHz/V,${\pm}$24%), and a very wide tuning range of 76.9%. The designed frequency synthesizer has a phase noise of -106dBc/Hz at 100kHz offset, and the lock time is less than $10{\mu}$sec. It consumes 20~23mA from a 1.8V supply, and the chip size including PADs is 2.0mm${\times}$1.8mm.

Development of depression diagnosis system using EEG signal (뇌파 측정 신호를 이용한 우울증 진단장치 개발)

  • Kim, Kyu-Sung;Jung, Ju-Hyeon;Lee, Woo-Cheol
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.12
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    • pp.452-458
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    • 2017
  • In this study, a device was developed for diagnosing depression using EEG signals from July 2016 to June 2017. For normal people, the left alpha rhythm is more activated than the right alpha rhythm, but for the depressed patients, the right alpha rhythm is more activated than the left one. An analog circuit and digital low pass filter were used for noise removal and amplification of EEG, and the Hamming window function was applied to eliminate the signal leakage generated by the fast Fourier transform. To verify the validity of the developed diagnosis system, the EEG of 20 university students in the 3rd and 4th grade with an average age of 24 years was measured. Calculations of the relative value of the left and right alpha rhythm for the depression diagnosis revealed a minimum, maximum, and mean value of 66.7, 113.3, and 92.2, respectively. In addition, 7 out of 20 subjects were between 90 and 95, and those with a higher mean deviation of approximately 20 tended to have mild depression. These results can provide meaningful data for the development of depression treatment equipment by solving the left and right brain asymmetry problem, and it may be applied usefully to diagnose depression after clinical trials on a large number of depressed patients.

Automation of Building Extraction and Modeling Using Airborne LiDAR Data (항공 라이다 데이터를 이용한 건물 모델링의 자동화)

  • Lim, Sae-Bom;Kim, Jung-Hyun;Lee, Dong-Cheon
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.27 no.5
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    • pp.619-628
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    • 2009
  • LiDAR has capability of rapid data acquisition and provides useful information for reconstructing surface of the Earth. However, Extracting information from LiDAR data is not easy task because LiDAR data consist of irregularly distributed point clouds of 3D coordinates and lack of semantic and visual information. This thesis proposed methods for automatic extraction of buildings and 3D detail modeling using airborne LiDAR data. As for preprocessing, noise and unnecessary data were removed by iterative surface fitting and then classification of ground and non-ground data was performed by analyzing histogram. Footprints of the buildings were extracted by tracing points on the building boundaries. The refined footprints were obtained by regularization based on the building hypothesis. The accuracy of building footprints were evaluated by comparing with 1:1,000 digital vector maps. The horizontal RMSE was 0.56m for test areas. Finally, a method of 3D modeling of roof superstructure was developed. Statistical and geometric information of the LiDAR data on building roof were analyzed to segment data and to determine roof shape. The superstructures on the roof were modeled by 3D analytical functions that were derived by least square method. The accuracy of the 3D modeling was estimated using simulation data. The RMSEs were 0.91m, 1.43m, 1.85m and 1.97m for flat, sloped, arch and dome shapes, respectively. The methods developed in study show that the automation of 3D building modeling process was effectively performed.

Development of GPS Multipath Error Reduction Method Based on Image Processing in Urban Area (디지털 영상을 활용한 도심지 내 GPS 다중경로오차 경감 방법 개발)

  • Yoon, Sung Joo;Kim, Tae Jung
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.36 no.2
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    • pp.105-112
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    • 2018
  • To determine the position of receiver, the GPS (Global Positioning System) uses position information of satellites and pseudo ranges based on signals. These are reflected by surrounding structures and multipath errors occur. This paper proposes a method for multipath error reduction using digital images to enhance the accuracy. The goal of the study is to calculate the shielding environment of receiver using image processing and apply it to GPS positioning. The proposed method, firstly, performs a preprocessing to reduce the effect of noise on images. Next, it uses hough transform to detect the outline of building roofs and determines mask angles and permissible azimuth range. Then, it classifies the satellites according to the condition using the image processing results. Finally, base on point positioning, it computes the receiver position by applying a weight model that assigns different weights to the classified satellites. We confirmed that the RMSE (Root Mean Square Error) was reduced by 2.29m in the horizontal direction and by 15.62m in the vertical direction. This paper showed the potential for the hybrid of GPS positioning and image processing technology.

Real-Time Implementation of MPEG-1 Layer III Audio Decoder Using TMS320C6201 (TMS320C6201을 이용한 MPEG-1 Layer III 오디오 디코더의 실시간 구현)

  • 권홍석;김시호;배건성
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.8B
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    • pp.1460-1468
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    • 2000
  • The goal of this research is the real-time implementation of MPEG-1 Layer III audio decoder using the fixed-point digital signal processor of TMS320C6201 The main job for this work is twofold: one is to convert floating-point operation in the decoder into fixed-point operation while maintaining the high resolution, and the other is to optimize the program to make it run in real-time with memory size as small as possible. We, especially, devote much time to the descaling module in the decoder for conversion of floating-point operation into fixed-point operation with high accuracy. The inverse modified cosine transform(IMDCT) and synthesis polyphase filter bank modules are optimized in order to reduce the amount of computation and memory size. After the optimization process, in this paper, the implemented decoder uses about 26% of maximum computation capacity of TMS320C6201. The program memory, data ROM, data RAM used in the decoder are about 6.77kwords, 3.13 kwords and 9.94 kwords, respectively. Comparing the PCM output of fixed-point computation with that of floating-point computation, we achieve the signal-to-noise ratio of more than 60 dB. A real-time operation is demonstrated on the PC using the sound I/O and host communication functions in the EVM board.

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Design of a CMOS Tx RF/IF Single Chip for PCS Band Applications (PCS 대역 송신용 CMOS RF/IF 단일 칩 설계)

  • Moon, Yo-Sup;Kwon, Duck-Ki;Kim, Keo-Sung;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of IKEEE
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    • v.7 no.2 s.13
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    • pp.236-244
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    • 2003
  • In this paper, RF and IF circuits for mobile terminals which have usually been implemented using expensive BiCMOS processes are designed using CMOS circuits, and a Tx CMOS RF/IF single chip for PCS applications is designed. The designed circuit consists of an IF block including an IF PLL frequency synthesizer, an IF mixer, and a VGA and an RF block including a SSB RF mixer and a driver amplifier, and performs all transmit signal processing functions required between digital baseband and the power amplifier. The phase noise level of the designed IF PLL frequency synthesizer is -114dBc/Hz@100kHz and the lock time is less than $300{\mu}s$. It consumes 5.3mA from a 3V power supply. The conversion gain and OIP3 of the IF mixer block are 3.6dB and -11.3dBm. It consumes 5.3mA. The 3dB frequencies of the VGA are greater than 250MHz for all gain settings. The designed VGA consumes 10mA. The designed RF block exhibits a gain of 14.93dB and an OIP3 of 6.97dBm. The image and carrier suppressions are 35dBc and 31dBc, respectively. It consumes 63.4mA. The designed circuits are under fabrication using a $0.35{\mu}m$ CMOS process. The designed entire chip consumes 84mA from a 3V supply, and its area is $1.6㎜{\times}3.5㎜$.

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A Study on Lip-reading Enhancement Using Time-domain Filter (시간영역 필터를 이용한 립리딩 성능향상에 관한 연구)

  • 신도성;김진영;최승호
    • The Journal of the Acoustical Society of Korea
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    • v.22 no.5
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    • pp.375-382
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    • 2003
  • Lip-reading technique based on bimodal is to enhance speech recognition rate in noisy environment. It is most important to detect the correct lip-image. But it is hard to estimate stable performance in dynamic environment, because of many factors to deteriorate Lip-reading's performance. There are illumination change, speaker's pronunciation habit, versatility of lips shape and rotation or size change of lips etc. In this paper, we propose the IIR filtering in time-domain for the stable performance. It is very proper to remove the noise of speech, to enhance performance of recognition by digital filtering in time domain. While the lip-reading technique in whole lip image makes data massive, the Principal Component Analysis of pre-process allows to reduce the data quantify by detection of feature without loss of image information. For the observation performance of speech recognition using only image information, we made an experiment on recognition after choosing 22 words in available car service. We used Hidden Markov Model by speech recognition algorithm to compare this words' recognition performance. As a result, while the recognition rate of lip-reading using PCA is 64%, Time-domain filter applied to lip-reading enhances recognition rate of 72.4%.

Design and Implementation of Adaptive Beam-forming System for Wi-Fi Systems (무선랜 시스템을 위한 적응형 빔포밍 시스템의 설계 및 구현)

  • Oh, Joohyeon;Gwag, Gyounghun;Oh, Youngseok;Cho, Sungmin;Oh, Hyukjun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.9
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    • pp.2109-2116
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    • 2014
  • This paper presents the implementation and design of the advanced WI-FI systems with beam-forming antenna that radiate their power to the direction of user equipment to improve the overall throughput, contrast to the general WI-FI systems equipped with omni-antenna. The system consists of patch array antenna, DSP, FPGA, and Qualcomm's commercial chip. The beam-forming system on the FPGA utilizes the packet information from Qualcomm's commercial chip to control the phase shifters and attenuators of the patch array antenna. The PCI express interface has been used to maximize the communication speed between DSP and FPGA. The directions of arrival of users are managed using the database, and each user is distinguished by the MAC address given from the packet information. When the system wants to transmit a packet to one user, it forms beams to the direction of arrival of the corresponding user stored in the database to maximize the throughput. Directions of arrival of users are estimated using the received preamble in the packet to make its SINR as high as possible. The proposed beam-forming system was implemented using an FPGA and Qualcommm's commercial chip together. The implemented system showed considerable throughput improvement over the existing general AP system with omni-directional antenna in the multi-user communication environment.