• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.53-60
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• 2005

Recently, sub-micron CMOS technologies have taken the place of III-V materials in a number of areas in integrated circuit designs, in particular even for the applications of gjgabit optical communication applications due to its low cost, high integration level, low power dissipation, and short turn-around time characteristics. In this paper, a four-channel transimpedance amplifier (TIA) array is realized in a standard 0.35mm CMOS technology Each channel includes an optical PIN photodiode and a TIA incorporating the fully differential regulated cascode (RGC) input configuration to achieve effectively enhanced transconductance(gm) and also exploiting the inductive peaking technique to extend the bandwidth. Post-layout simulations show that each TIA demonstrates the mid-band transimpedance gain of 59.3dBW, the -3dB bandwidth of 2.45GHz for 0.5pF photodiode capacitance, and the average noise current spectral density of 18.4pA/sqrt(Hz). The TIA array dissipates 92mw p in total from a single 3.3V supply The four-channel RGC TIA array is suitable for low-power, high-speed optical interconnect applications.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.4
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• pp.25-35
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• 2002

This work describes an 8b 200MHz time-interleaved subranging analog-to-digital converter (ADC) based on a single-poly digital CMOS process. Two fine ADCs for lower digital bits of the proposed ADC employ a time-sharing double-channel architecture to increase system speed and a new reference voltage switching scheme to reduce settling time of the reference voltages and chip area. The proposed intermeshed resistor string, which generates reference voltages for fine ADCs, improves linearity and settling time of the reference voltages simultaneously. The proposed sample- and-hold amplifier(SHA) is based on a highly linear common-drain amplifier and passive differential circuits to minimize power consumption and chip area with 8b accuracy and employs input dynamic common mode feedback circuits for high dynamic performance at a 200MHz sampling rate. A new encoding circuit in a coarse ADC simplifies the signal processing between the coarse ADC and two successive fine ADCs.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.4
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• pp.403-409
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• 2013

In this work, a CMOS two stage differential power amplifier which includes Marchand balun, transformer and injection-locked buffer is presented. The power amplifier is targeted for 70 GHz frequency band and fabricated using 65 nm technology. The measurement results show 8.5 dB maximum voltage gain at 71.3 GHz and 7.3 GHz 3 dB bandwidth. The measured maximum output power is 8.2 dBm, input $P_{1dB}$ is -2.8 dBm, output $P_{1dB}$ is 4.6 dBm and maximum power added efficiency is 4.9 %. The power amplifier consumes 102 mW DC power from 1.2 V supply voltage.

• Journal of the Korean Institute of Telematics and Electronics
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• v.8 no.2
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• pp.24-33
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• 1971

A noble method of delta modulation by means of pair transistor circuit having negative resistance charcteristic is presented. An RC parallel circuit is inserted between two eiuitter tarminals of the pair transistor circuit, and their emitters are driven by a square pulsed current source. Basically this is a relaxation oscillator circuit. But when the value of capacitors and resistanc R, and the pulse height of driving source are properly chosen, the RC parallel circuit apparently functions as integrating circuit of driviving pulses. Compared with the integrated voltage of capacitor C, a signal input voltatage supplied in series with RC parallel circuit between two emitters makes on or off either of the pair transistors. as the result, one bit pulse is sent out from the coupling resistance terminal of conducted transistor. The circuit diagram used for this experiment is presented, it i% composed with simple mod ulster circuit, differential amplifier and pulse shaping amplifier, The characteristics of the components of this ciruit are discussed, and especially quantumized noise in this delta modulation system is discussed in order to improve the signal to noise ratio which has a close relation with circut constants, quantumized voltage, pulse height and width of driving current source.

• Journal of Sensor Science and Technology
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• v.4 no.2
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• pp.14-21
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• 1995

This paper deals with the active magnetic field measuring system which can measure the time-varying magnetic fields generated by power installations and lightning discharges. The magnetic field measuring system consists of the loop-type magnetic field sensor and the active integrator operated by a differential amplifier. The theoretical principle and design rule of the time-varying magnetic field measuring device and the calibration apparatus are introduced. From the calibration experiments, the frequency bandwidth of the full measuring system ranges from 270 Hz to about 2.3 MHz and the response sensitivity for magentic field strength is 128 $mV/{\mu}T$, respectively, and the calculated B-field values in the center of the loop-type sensor versus the the applied current made with a region of ${\pm}3\;%$error. The actual survey experiments by using lightning impulse current and oscillating impulse current were performed, the results of comparision between the input current waveforms and the magnetic field waveforms are a good agreement with each others and their deviations are less than 0.5 %.

• Journal of Welding and Joining
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• v.14 no.3
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• pp.48-57
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• 1996

A study was made to examine the characteristics of base metal and stress relief cracking(SRC) of heat affected zone(HAZ) for HY-100 and Cu-bearing HSLA-100 steels. The Gleeble thermal/mechanical simulator was used to simulate the SRC/HAZ. The details of mechanical properties of base plate and SRC tested specimens were studied by impact test, optical microscopy and scanning electron microscopy. The specimens were aged at $650^{\circ}C$ for HSLA-100 steel and at $660^{\circ}C$ for HY-100 steel and thermal cycled from $1350^{\circ}C$ to $25^{\circ}C$ with a cooling time of $\Delta$t_${800^{circ}C/500^{circ}C}$=21sec. corresponds to the heat input of 30kJ/cm. The thermal cycled specimens were stressed to a predetermined level of 248~600MPa and then reheated to the stress relief temperatures of $570~620^{\circ}C$. The time to failure$(t_f)$ at a given stress level was used as a measure of SRC susceptibility. The strength, elongation and impact toughness of base plate were greater in HSLA-100 steel than in HY-100 steel. The time to failure was decreased with increasing temperature and/or stress. HSLA-100 steel was more susceptible to stress relief cracking than HY-100 steel under same conditions. It is thought to be resulted from the precipitation of $\varepsilon$-Cu phase by dynamic self diffusion of solute atoms. By the precipitation of $\varepsilon$-Cu phase, the differential strengthening of grain interior relative to grain boundary may be greater in the Cu-bearing HSLA-100 steel than in HY-100 steel. Therefore, greater strain concentration at grain boundary of HSLA-100 steel results in the increased SRC susceptibility. The activation energies for SRC of HSLA-100 steel are 103.9kcal/mal for 387MPa and 87.6kcal/mol for 437MPa and that of HY-100 steel is 129.2kcal/mol for 437MPa.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.1028-1035
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• 1999

To increase the throughput of data transmission in burst-mode TDMA communication systems and also to get a good BER performance at the same time, it is essential to rapidly acquire the carrier while keeping the desirable tracking performance. To achieve this goal, in this paper, a new decision-directed carrier recovery algorithm is presented. The proposed scheme does not incorporate the PLL and suppress the Gaussian random process of input noise by the pre-stage low pass filter so as to get both the fast acquisition and a good performance. Through computer simulations, the performance of the scheme is analyzed with respect to the acquisition time and bit error rate. The cycle slip in the proposed scheme is seldom observed at very low SNR environment in contrast to the previous proposed one. Because of this merit, it is not required to do the differential encoding and decoding in the proposed scheme.

• Proceedings of the SAREK Conference
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• 2008.06a
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• pp.109-114
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• 2008

A dynamic model has been developed to simulate dynamic operation of a real double-effect absorption chiller. Dynamic behavior of working fluids in main components was modeled in first-order nonlinear differential equations based on heat and mass balances. Mass transport mechanisms among the main components were modeled by valve throttling, 'U' tube overflow and solution sub-cooling. The nonlinear dynamic equations coupled with the subroutines to calculate thermodynamic properties of working fluids were solved by a numerical method. The dynamic performance of the model was compared with the test data of a commercial medium chiller. The model showed a good agreement with the test data except for the first 5,000 seconds during which different flow rates of the weak solution caused some discrepancy. It was found that the chiller dynamics is governed by the inlet temperatures of the cooling water and the chilled water when the heat input to the chiller is relatively constant.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.6
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• pp.61-70
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• 2015

This study, under the assumption that there may be a difference in colours recognized depending on background lightness and colour stimulus size, applied background lightness in a differential way and conducted an experiment by comparing the sizes of stimuli equivalent to $2^{\circ}$ and $10^{\circ}$. Based on the results, by reflecting the results of this experiment as a difference in colour recognition, which may occur when the input image is converted from a large-sized screen to a mobile-sized screen, power efficiency, one of the biggest issues, can be reflected in mobile devices and may contribute to effective three-dimensional image reproduction and image quality in 3-D or hologram as well as 2-D images.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.8
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• pp.1-11
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• 2002

A multi-section DFB-LD shows optical bistability subject to externally injected light signal, then it has potential applications such as wavelength conversion and optical logic gates. In this paper, we have studied the optical bistability in multi-section DFB-LD using split-step time-domain model. It is confirmed that the multi-section DFB-LD, which is excited inhomogeneously, shows bistability. The optical bistable characteristics are investigated when input light is injected into a absorptive region. Simulation results show that multi-section DFB-LD works as a flip-flop depending on the set-reset optical pulse which has a few ns in switching time and a few pj in switching energy, so that it can act as a optical logic device. Besides, if we change the carrier lifetime and the differential gain coefficient, it is expected that the response time of optical output signal can be reduced.