• 제목/요약/키워드: Dielectric layers

검색결과 441건 처리시간 0.026초

무전해 Ni-B 도금을 이용한 플라즈마 디스플레이 버스 전극용 확산방지막의 열처리 영향 (Effect of Heat Treatment of the Diffusion Barrier for Bus Electrode of Plasma Display by Electroless Ni-B Deposition)

  • 최재웅;황길호;홍석준;강성군
    • 한국재료학회지
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    • 제14권8호
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    • pp.552-557
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    • 2004
  • Thin Ni-B films, 1 ${\mu}m$ thick, were electrolessly deposited on Cu bus electrode fabricated by electro deposition. The purpose of these films is to encapsulate Cu electrodes for preventing Cu oxidation and to serve as a diffusion barrier against copper contamination of dielectric layer in AC-plasma display panel. The layers were heat treated at $580^{\circ}C$(baking temperature of dielectric layer) with and without pre-annealing at $300^{\circ}C$($Ni_{3}B$ formation temperature) for 30 minutes. In the layer with pre-annealing, amount of Cu diffusion was lower about 5 times than that in the layer without pre-annealing. The difference of Cu concentration could be attributed to Cu diffusion before $Ni_{3}B$ formation at grain boundaries. However, the diffusion behavior of the layer with pre-annealing was similar to that of the layer without pre-annealing after $Ni_{3}B$ formation. With increasing annealing time, Cu concentration of both layers increased due to grain growth.

모서리 경계조건을 만족하는 접지된 2개 유전체층 위의 도체띠 격자구조에 의한 TE 산란의 해 (Solution of TE Scattering by a Conductive Strip Grating Over the Grounded Two Dielectric Layers with Edge Boundary Condition)

  • 윤의중
    • 한국항행학회논문지
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    • 제17권2호
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    • pp.183-188
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    • 2013
  • 본 논문에서는 모서리 경계조건을 만족하는 접지된 2개의 유전체층 위의 완전도체띠 격자구조에 의한 TE (Transverse Electric)산란 문제를 수치해석 방법인 FGMM (Fourier Galerkin Moment Method)를 이용하여 해석하였다. TE 산란에 대하여 유도되는 표면 전류밀도는 스트립 양 끝에서 0의 값이 기대되며, 이때 도체띠에 유도되는 표면 전류밀도는 2종 Chebyshev 다항식과 적절한 모서리 경계조건을 만족하는 함수의 곱의 급수로 전개하였다. 수치결과들은 기존 논문들과 비교하여 급속한 수렴해와 좋은 일치를 보였다.

2개의 유전체 층을 갖는 도체 격자구조에 의한 E-분극 산란해석 (Analysis on E-polarized Scattering by a Conducting Strip grating with 2 Dielectric Layers)

  • Seung-In Yang
    • 한국전자파학회지:전자파기술
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    • 제6권3호
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    • pp.68-74
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    • 1995
  • 본 논문에서는 2개의 유전체 층을 가지는 도체 스트립 격자구조에 의한 E-분극 산란 문제를 Fourier-Falerkin 모멘트 법으로 해석했으며, 기학광학 반사 및 투과전력을 계산 하였다. 도체띠에 유도되는 전기전류는 간단한 지수함수를 이용하여 프리에 급수로 전개하였으며, 각 경계면에서의 전자계 경계조건을 적용하였다. 그리고 산란 전자파는 Floquet 모드 함수르 이용하여 무한개의 급수로 전개하였다. 본 논문에서 제안된 방법의 타당성을 입증하기위하여 기존 논문의 수치결과와 비교한 결과 매우 잘 일치하였다.

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MCM-D 기판 내장형 수동소자 제조공정 (Fabrication process of embedded passive components in MCM-D)

  • 주철원;이영민;이상복;현석봉;박성수;송민규
    • 마이크로전자및패키징학회지
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    • 제6권4호
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    • pp.1-7
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    • 1999
  • MCM-D 기판에 수동소자를 내장시키는 공정을 개발하였다. MCM-D 기판은 Cu/감광성 BCB를 각각 금속배선 및 절연막 재료로 사용하였고, 금속배선은 Ti/cu를 각각 1000$\AA$/3000$\AA$으로 스퍼터한 후 fountain 방식으로 전기 도금하여 3 um Cu를 형성하였으며, BCB 층에 신뢰성있는 비아형성을 위하여 BCB의 공정특성과 $C_2F_6$를 사용한 플라즈마 cleaning영향을 AES로 분석하였다. 이 실험에서 제작한 MCM-D 기판은 절연막과 금속배선 층이 각각 5개, 4개 층으로 구성되는데 저항은 2번째 절연막 위에 thermal evaporator 방식으로 NiCr을 600$\AA$증착하여 시트저항이 21 $\Omega$/sq가 되게 형성하였고. 인덕터는 coplanar 구조로 3, 4번째 금속배선층에 형성하였으며, 커패시터는 절연막으로 PECVD $Si_3N_4$를 900$\AA$증착한 후 1, 2번째 금속배선층에 형성하여 88nF/$\textrm {cm}^2$의 커패시턴스를 얻었다. 이 공정은 PECVD $Si_3N_4$와 thermal evaporation NiCr 공정을 이용함으로써 기존의 반도체 공정을 이용하여 MCM-D 기판에 수동소자를 안정적으로 내장시킬 수 있었다.

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Formation and Characteristics of the Fluorocarbonated SiOF Film by $O_2$/FTES-Helicon Plasma CVD Method

  • Kyoung-Suk Oh;Min-Sung Kang;Chi-Kyu Choi;Seok-Min Yun
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 1998년도 제14회 학술발표회 논문개요집
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    • pp.77-77
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    • 1998
  • Present silicon dioxide (SiOz) 떠m as intennetal dielectridIMD) layers will result in high parasitic c capacitance and crosstalk interference in 비gh density devices. Low dielectric materials such as f f1uorina뼈 silicon oxide(SiOF) and f1uoropolymer IMD layers have been tried to s이ve this problem. I In the SiOF ftlm, as fluorine concentration increases the dielectric constant of t뼈 film decreases but i it becomes unstable and wa않r absorptivity increases. The dielectric constant above 3.0 is obtain어 i in these ftlms. Fluoropolymers such as polyte$\sigma$따luoroethylene(PTFE) are known as low dielectric c constant (>2.0) materials. However, their $\alpha$)Or thermal stability and low adhesive fa$\pi$e have h hindered 야1리ru뚱 as IMD ma따"ials. 1 The concept of a plasma processing a찌Jaratus with 비gh density plasma at low pressure has r received much attention for deposition because films made in these plasma reactors have many a advantages such as go여 film quality and gap filling profile. High ion flux with low ion energy in m the high density plasma make the low contamination and go어 $\sigma$'Oss피lked ftlm. Especially the h helicon plasma reactor have attractive features for ftlm deposition 야~au똥 of i앙 high density plasma p production compared with other conventional type plasma soun:es. I In this pa야Jr, we present the results on the low dielectric constant fluorocarbonated-SiOF film d밑JOsited on p-Si(loo) 5 inch silicon substrates with 00% of 0dFTES gas mixture and 20% of Ar g gas in a helicon plasma reactor. High density 띠asma is generated in the conventional helicon p plasma soun:e with Nagoya type ill antenna, 5-15 MHz and 1 kW RF power, 700 Gauss of m magnetic field, and 1.5 mTorr of pressure. The electron density and temperature of the 0dFTES d discharge are measUI벼 by Langmuir probe. The relative density of radicals are measured by optic허 e emission spe따'Oscopy(OES). Chemical bonding structure 3I피 atomic concentration 따'C characterized u using fourier transform infrared(FTIR) s야3띠"Oscopy and X -ray photonelectron spl:’따'Oscopy (XPS). D Dielectric constant is measured using a metal insulator semiconductor (MIS;AVO.4 $\mu$ m thick f fIlmlp-SD s$\sigma$ucture. A chemical stoichiome$\sigma$y of 야Ie fluorocarbina$textsc{k}$영-SiOF film 따~si야영 at room temperature, which t the flow rate of Oz and FTES gas is Isccm and 6sccm, res야~tvely, is form려 야Ie SiouFo.36Co.14. A d dielec$\sigma$ic constant of this fIlm is 2.8, but the s$\alpha$'!Cimen at annealed 5OOt: is obtain려 3.24, and the s stepcoverage in the 0.4 $\mu$ m and 0.5 $\mu$ m pattern 킹'C above 92% and 91% without void, res야~tively. res야~tively.

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Hafnium Oxide Layer Based Metal-Oxide-Semiconductor (MOS) Capacitors with Annealing Temperature Variation

  • 이나영;최병덕
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.318.1-318.1
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    • 2016
  • Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.

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PDP용 무연 투명유전체의 Dry Film 개발 (Development of Dry Films of Lead-free Transparent Dielectrics for PDP)

  • 이지훈;방재철
    • 한국산학기술학회논문지
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    • 제6권6호
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    • pp.497-501
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    • 2005
  • Dry film 공정에 의해 PDP(Plasma Display Panel)용 무연 투명유전체를 제조하였다. 여러 슬러리 조성으로부터 고밀도 green sheet를 제조하는데 최적의 조성을 선정하였다. 한편, 슬러리는 양질의 green sheet를 제작하는데 적합한 shear thinning 특성을 나타냈다. 제조한 투명유전체의 열팽창계수는 유리기판인 PD-200과 유사한 $97{\times}10^{-7}/^{\circ}C$로 측정되었다. PD-200에 접합된 투명유전체의 단면 주사현미경 관찰로부터 두 층은 갭이 없이 매우 견실히 접합되어 있음을 확인할 수 있었다.

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접지된 유전체층 위에 변하는 저항율을 갖는 저항띠 격자구조에서의 전자파산란 해석 -한쪽 모서리에서 0이고 다른쪽 모서리로 가면서 무한대로 변하는 경우- (Analysis of the Electromagnetic Scattering by a Resistive Strip Grating Tapered Resistivity On a Grounded Dielectric Plane -from Zeores at One Edge to Infinite at the Other Edge-)

  • 윤의중
    • 정보학연구
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    • 제8권2호
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    • pp.77-84
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    • 2005
  • In this paper, electromagnetic scattering problems by a resistive strip grating with tapered resistivity on a grounded dielectric plane according to strip width and spacing, relative permittivity and thickness of dielectric layers, and incident angles of a electric wave are analyzed by applying the Fourier-Galerkin Moment Method known as a numerical procedure. The boundary conditions are applied to obtain the unknown field coefficients and the resistive boundary condition is used for the relationship between the tangential electric field and the electric current density on the strip. The resistivity of resistive strips in this paper varies from zeroes at one edge to infinite at the other edge, then the induced surface current density on the resistive strip is expanded in a series of Jacobi polynomials of the order ${\alpha}=0.2,\;{\beta}=-0.2$ as a orthogonal polynomials. The numerical results of the geometrically normalized reflected power in this paper are compared with those for the existing perfectly conducting strip. The numerical results of the normalized reflected power for conductive strips case with zero resistivity in this paper show in good agreement with those of existing papers.

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실리콘 다층절연막의 전기전도 특성 (The electrical conduction characteristics of the multi-dielectric silicon layer)

  • 정윤해;한원열;박영걸
    • E2M - 전기 전자와 첨단 소재
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    • 제7권2호
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    • pp.145-151
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    • 1994
  • The multi-dielectric layer SiOz/Si3N4/SiO2(ONO) is used to scale down the memory device. In this paper, the change of composition in ONO layer due to the process condition and the conduction mechanism are observed. The composition of the oxide film grown through the oxidation of nitride film is analyzed using auger electron spectroscopy(AES). AES results show that oxygen concentration increases at the interface between oxide and nitride layers as the thickness -of the top oxide layer increases. Results of I-V measurement show that the insulating properties improve as the thickness of the top oxide layer increases. But when the thickness of the nitride layer decreases below 63.angs, insulating peoperties of film 28.angs. of top oxide and film 35.angs. turn over showing that insulating property of film 28.angs. of top oxide is better than that of film 35.angs. of top oxide. This phenomenon of turn over is thought as the result of generation of surface state due to oxygen flow into nitride during oxidation process. As the thickness of the top oxide and nitride increases, the electrical breakdown field increases, but when the thickness of top oxide reaches 35.angs, the same phenomenon of turn over occurs. Optimum film thickness for scaled multi-layer dielectric of memory device SONOS is estimated to be 63.angs. of nitride layer and 28.angs. of top oxide layer. In this case, maximum electrical breakdown field and leakage current are 18.5[MV/cm] and $8{\times}{10^-12}$[A], respectively.

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후막회로 절연용 다성분계 무알카리 유리의 제조 및 결정화 특성 (Preparation and crystallization of non-alkali multicomponent glasses for thick-film insulators)

  • 이헌수;손명모;박희찬
    • E2M - 전기 전자와 첨단 소재
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    • 제8권1호
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    • pp.95-101
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    • 1995
  • Crystallizable glasses with precipitation of celsian, anorthite, wollastonite and gahnite were prepared for the purpose of insulating dielectric layers in devices such as integrated circuit substrates. The starting glasses were prepared by melting the batches for 1 hour at 1450.deg. C and then Quenching to a distilled water. And crystallization behavior of these glasses were studied by DTA, TMA, XRD analysis and by the measurement of dielectric properties. The overall composition of the glass-ceramic consists in weight percent of 30-35% A1$_{2}$O$_{3}$, 13-26% BaO, 5-21% CaO, 10-24% ZnO, 4.5-9.0% TiO$_{2}$ and 4-8% B$_{2}$O$_{3}$. As a result, in barium-rich glasses only celsian phase was developed in the range of 850-900.deg. C. Also, the thermal expansion coefficient, dielectric constant and quality factor of these glass-ceramics were 68*10$^{-7}$ /.deg. C, about 9 and more than 1000, respectively.

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