• Transactions on Electrical and Electronic Materials
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• v.5 no.1
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• pp.29-33
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• 2004

The materials showing high structure dispersity have been developed on the quartz base by mechano-chemical technology. Depending on the processing conditions and subsequent applications, the materials produced by mechano-chemical reaction (MCR) showed concurrently magnetic, dielectric and electrical properties. The obtained magnetic-electrical powders classified by aggregate complex of their features as segneto-magnetics, contained a dielectric material as a carrying nucleus, particularly the quartz on that surface one or more layers of different compounds was synthesized having thickness up to 10∼50 nm and showing magnetic properties and etc.

• Journal of the Korean institute of surface engineering
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• v.33 no.4
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• pp.217-221
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• 2000

The gate oxide thickness is becoming thinner and thinner in order to speed up the semiconductor CMOS devices. We have investigated very thin$ SiO_2$ gate oxide layers and found anomaly between the thickness determined with capacitance measurement and these obtained with cross-sectional high resolution transmission electron microscopy. The thicknesses difference of the two becomes important for the thickness of the oxide below 5nm. We propose that the variation of dielectric constant in thin oxide films cause the anomaly. We modeled the behavior as (equation omitted) and determined $\varepsilon_{bulk}$=3.9 and $\varepsilon_{int}$=-4.0. We predict that optimum $SiO_2$ gate oxide thickness may be $20\AA$ due to negative contribution of the interface dielectric constant. These new results have very important implication for designing the CMOS devices.s.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.1
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• pp.77-82
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• 2020

In this paper, E-polarized electromagnetic scattering problems by a conductive strip grating between a double dielectric layer are analyzed by applying the FGMM(Fourier-Galerkin moment method) known as a numerical method of electromagnetic fileld. The boundary conditions are applied to obtain the unknown field coefficients, and the conductive boundary condition is applied to analysis of the conductive strip. The numerical results for the normalized reflected and transmitted power are analyzed by according as the width and spacing of conductive strip, the relative permittivity and thickness of the double dielectric layers, and incident angles. Generally, as the value of the dielectric constant of the double dielectric layer increases, the reflected power increases and the transmitted power decreases, respectively. As the dielectric constant of the double dielectric layer increases, the current density induced in the strip center increases. The numerical results for the presented structure of this paper are shown in good agreement compared to those of the existing papers.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.35 no.6
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• pp.583-589
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• 2011

The dielectric breakdown of bone-like materials subject to purely electric fields is investigated. In general, these materials consist of some layers with stronger dielectric strength and others with weaker dielectric strength in a parallel staggered pattern. The growth of the conductive channel is impeded during penetration of the weaker layer in the bone-like material because the electric-field concentration is relieved. The electric-field distribution around the head of the tubular channel is obtained from finite element analysis. The dielectric strength of the bone-like material is evaluated using the J integral, and some parameters affecting the dielectric strength are determined. It is shown that the J-integral values are reduced with an increase in the breakdown area in the weaker layer. It is also found that the ratio of the permittivity of the weaker layer to that of the stronger layer can strongly affect the dielectric breakdown.

• Proceedings of the Materials Research Society of Korea Conference
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• 2002.05a
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• pp.57-57
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• 2002

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2009.06a
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• pp.291-292
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• 2009

• Proceedings of the Optical Society of Korea Conference
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• 2005.07a
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• pp.126-127
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• 2005

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.53-53
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• 2009

Charge trap flash memory devices with modified tunneling barriers were fabricated using the tunneling barrier engineering technique. Variable oxide thickness (VARIOT) barrier and CRESTED barrier consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were used as engineered tunneling barriers. The VARIOT type tunneling barrier composed of oxide-nitride-oxide (ONO) layers revealed reliable electrical characteristics; long retention time and superior endurance. On the other hand, the CRESTED tunneling barrier composed of nitride-oxide-nitride (NON) layers showed degraded retention and endurance characteristics. It is found that the degradation of NON barrier is associated with the increase of interface state density at tunneling barrier/silicon channel by programming and erasing (P/E) stress.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.496-498
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• 2007

This paper reports our observation that the addition of nanoparticles in the negative dielectric anisotropic liquid crystal (LC) cell can exhibit the properties of vertical alignment without using alignment layers. The electro-optical properties of this nanoparticles-induced vertical alignment in the LC cell are very similar to the conventional homeotropic LC cell with alignment layers. This technique can be used to fabricate a flexible LC display demanding low temperature process

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.5
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• pp.396-401
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• 2000

In order to accurately measure the high voltage of 22.9[kV] power distribution lines we investigated the temperature dependence of measuring voltage on the number of stack layers in the voltage measurement system made from single and stack voltage divider capacitors (22, 44, 66 layers, respectively). Temperature coefficient of dielectric constant(TC$\varepsilon_{{\gamma}}$/)of voltage divider capacitors which were fabricated by BaTi $O_3$system ceramics showed the variations from -2.28% to +1.69% in the range of -25[$^{\circ}C$] ~50[$^{\circ}C$]) was decreased with increasing of stack number and the stack element of 66 layers showed the least error of $\pm$0.87%or of $\pm$0.87%.