• Title/Summary/Keyword: Device performance

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A MAC Design for Collision Avoidance in Wireless USB Home Networks (WUSB 홈네트워크에서의 충돌회피를 위한 MAC설계)

  • Sim, Jae-Hwan
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.1
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    • pp.55-64
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    • 2013
  • The USB-IF has specified a Wireless USB (WUSB) protocol based on UWB for high speed wireless home networks and WPANs. In this paper, firstly, performance degradation due to the Private Distributed Reservation Protocol (DRP) conflict problem caused by devices' mobility is analyzed. And a novel relay transmission protocol combined with Private DRP conflict resolution is proposed to overcome the performance degradation at Private DRP conflicts. In order to give the loser device due to Private DRP conflicts another chance to maintain resources, the proposed relay transmission protocol executed at each device helps the loser device reserve another indirect link maintaining the required resources via a relay node.

Characteristics of 3-Dimensional Integration Circuit Device (3차원 집적 회로 소자 특성)

  • Park, Yong-Wook
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.1
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    • pp.99-104
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    • 2013
  • As a demand for the portable device requiring smaller size and better performance is in hike, reducing the size of conventionally used planar 2 dimensional integration circuit(IC) cannot be a solution for the enhancement of the semiconductor integration circuit technology due to an increase in RC delay among interconnects. To address this problem, a new technology of 3 dimensional integration circuit (3D-IC) has been developing. In this study, three-dimensional integrated device was investigated due to improve of reducing the size, interconnection problem, high system performance and functionality.

Optimization of Double Gate Vertical Channel Tunneling Field Effect Transistor (DVTFET) with Dielectric Sidewall

  • WANG, XIANGYU;Cho, Wonhee;Baac, Hyoung Won;Seo, Dongsun;Cho, Il Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.2
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    • pp.192-198
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    • 2017
  • In this paper, we propose a novel double gate vertical channel tunneling field effect transistor (DVTFET) with a dielectric sidewall and optimization characteristics. The dielectric sidewall is applied to the gate region to reduced ambipolar voltage ($V_{amb}$) and double gate structure is applied to improve on-current ($I_{ON}$) and subthreshold swing (SS). We discussed the fin width ($W_S$), body doping concentration, sidewall width ($W_{side}$), drain and gate underlap distance ($X_d$), source doping distance ($X_S$) and pocket doping length ($X_P$) of DVTFET. Each of device performance is investigated with various device parameter variations. To maximize device performance, we apply the optimum values obtained in the above discussion of a optimization simulation. The optimum results are steep SS of 32.6 mV/dec, high $I_{ON}$ of $1.2{\times}10^{-3}A/{\mu}m$ and low $V_{amb}$ of -2.0 V.

Cu-SiO2 Hybrid Bonding (Cu-SiO2 하이브리드 본딩)

  • Seo, Hankyeol;Park, Haesung;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.27 no.1
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    • pp.17-24
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    • 2020
  • As an interconnect scaling faces a technical bottleneck, the device stacking technologies have been developed for miniaturization, low cost and high performance. To manufacture a stacked device structure, a vertical interconnect becomes a key process to enable signal and power integrities. Most bonding materials used in stacked structures are currently solder or Cu pillar with Sn cap, but copper is emerging as the most important bonding material due to fine-pitch patternability and high electrical performance. Copper bonding has advantages such as CMOS compatible process, high electrical and thermal conductivities, and excellent mechanical integrity, but it has major disadvantages of high bonding temperature, quick oxidation, and planarization requirement. There are many copper bonding processes such as dielectric bonding, copper direct bonding, copper-oxide hybrid bonding, copper-polymer hybrid bonding, etc.. As copper bonding evolves, copper-oxide hybrid bonding is considered as the most promising bonding process for vertically stacked device structure. This paper reviews current research trends of copper bonding focusing on the key process of Cu-SiO2 hybrid bonding.

Performance Analysis of Interference-Mitigated Opportunistic Relay System (간섭이 완화된 기회주의적인 중계기 시스템의 성능 분석)

  • Kim, Tae-Wook;Kong, Hyung-Yun
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.14 no.4
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    • pp.45-50
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    • 2014
  • In this paper, we proposed a method using the user mobile device to overcome the interference constraint without building a cooperative communication system. In addition, in order to mitigate interference, we apply the user mobile device selection method, and then exploit power allocation scheme in the user mobile device. The proposed protocol is analyzed in the Rayleigh fading environment, and the performance system is evaluated in terms of the bit error rate and the outage probability. The simulation results showed that when the proposed transmission algorithm is applied, the interference can be mitigated. Further, network overload problems can be solved in the weak channel interference. Therefore, we can increase the network capacity without additional relay.

Secure Multiplication Method against Side Channel Attack on ARM Cortex-M3 (ARM Cortex-M3 상에서 부채널 공격에 강인한 곱셈 연산 구현)

  • Seo, Hwajeong
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.27 no.4
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    • pp.943-949
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    • 2017
  • Cryptography implementation over lightweight Internet of Things (IoT) device needs to provide an accurate and fast execution for high service availability. However, adversaries can extract the secret information from the lightweight device by analyzing the unique features of computation in the device. In particular, modern ARM Cortex-M3 processors perform the multiplication in different execution timings when the input values are varied. In this paper, we analyze previous multiplication methods over ARM Cortex-M3 and provide optimized techniques to accelerate the performance. The proposed method successfully accelerates the performance by up-to 28.4% than previous works.

Press induced enhancement of contact resistance innanocomposite FET based on ZnO nanowire/polymer

  • Choe, Ji-Hyeok;Mun, Gyeong-Ju;Jeon, Ju-Hui;Kar, Jyoti Prakash;Das, Sachindra Nath;Gang, Dal-Yeong;Lee, Tae-Il;Myeong, Jae-Min
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2009.11a
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    • pp.26.2-26.2
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    • 2009
  • A simple route of externalmechanical force is presented for enhancing the electrical properties ofpolymer nanocomposite consisted of nanowires. By dispersing ZnO nanowires inpolymer solution and drop casting on substrates, nanocomposite transistorscontaining ZnO nanowires are successfully fabricated. Even though the ZnOnanowires density is properly controlled for device fabrication, as-cast devicedoesn't show any detectablecurrents, because nanowires are separated far from each other with theinsulating polymer matrix intervening between them. Compared to the devicepressed at 300 kPa, the device pressed at 600 kPa currents increased by 50times showing the linear behavior against drain voltage and exhibits promisingelectrical properties, which operates in the depletion mode with highermobility and on-current. Such an improved device performance would be realizedby the contacts improvement and the increase of the number of electrical pathinduced by external force. This approach provides a viable solution for seriouscontact resistance problem of nanocomposite materials and promises for futuremanufacturing of high-performance devices.

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Residential Gateway Design under Realtime Linux Environment (실시간 Linux 환경에서 상주형 게이트웨이의 설계)

  • Shim, Jang-Sup;Kim, Jong-Kyum;Jung, Soon-Key
    • The KIPS Transactions:PartA
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    • v.11A no.1
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    • pp.21-28
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    • 2004
  • In this paper, we describe the study of residential gateway design and the implementation of its core functional features under the realtime linux environment. This Paper has also suggested the developing example of device driver that can execute the realtime linux with stability based on the recent research findings of which is related to the functions of existing realtime operating system for residential gateway, and explained methods that can further improve performance by analyzing the performance characteristics of the system. And as a result, it was able to suggest the possibility of effective implementation of residential gateway under the realtime linux environment in this paper.

Development of the Sorting Inspection System for Screw/Bolt Using a Slant Method (슬랜트방식을 이용한 스크류/볼트 선별검사시스템 개발)

  • Kim, Yong-Seok;Yang, Soon-Yong
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.19 no.5
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    • pp.698-704
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    • 2010
  • The machine vision system has been widely applied at automatic inspection field of the industries. Especially, the machine vision system shows good performance at difficult inspection field by contact method. In this paper, the automatic system of a slant method to inspect screw/bolt shape using machine vision is developed. The inspection system uses pattern matching method that search similar degree of the lucidity, the average lucidity, length and angle of inspection set up area using a circular scan and a line scan method. Also the feeding method for inspection product is the slant method, and feed rate is controlled by the ramp angle adjustment. This inspection system is composed of a feeding device, a transfer device, vision systems, a lighting device and computer, and is composed the sorting discharge system of the inferior product. The performance test carried out the feeding speed, the shape correct degree and the sorting discharge speed according to the type of screw/bolt. This sorting inspection system showed a satisfied test results in whole inspection items. Presently, this sorting inspection system is being used in the manufacturing process of screw/bolt usefully.

Mechanism Design of the Micro Weighing Device by Using Null Balance Method (영위법을 이용한 미소중량 측정 장치의 기구설계)

  • Choi, In-Mook;Woo, Sam-Yong;Kim, Boo-Shik;Kim, Soo-Hyun
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.27 no.1
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    • pp.183-193
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    • 2003
  • Micro-weighing device by using null balance method is being essential part in fields of high-technology industries such as precision semiconductor industry, precision chemistry, biotechnology and genetics etc. Also, requirements for high resolution and for large measurement range increase more and more. The performance of the micro-weighing device can be determined by the mechanism design and analysis. The analytical design method has been proposed for the performance improvement such as resolution, measurement range and fast response. The 2-stage displacement amplification is designed to overcome the limit of conventional force transmitting lever. The parallel spring is designed for the measurement result independent of the input force position variation. Also, the natural frequency of mechanism is analyzed for the fast response. After each analysis, optimal design has been carried out. To verify the analysis and design result, characteristics experiments had been carried out after construction. Finally, the system had been controlled.