• Title/Summary/Keyword: Device performance

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Extreme baking effect of interlayer on PLED's performance

  • Kim, Mu-Gyeom;Kim, Sang-Yeol;Lee, Tae-Woo;Park, Sang-Hun;Park, Jong-Jin;Pu, Lyong-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1775-1778
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    • 2006
  • Through baking process on an interlayer, known as hole transporting layer, varying baking temperature up to 300 degree, which is considered as extremely high for polymer light emitting device (PLED) system, we found interesting relationship between packing density and morphology affecting device performance. Granular morphology shows that as temperature increases, grain size is getting smaller to pack closely and make interlayer harden. Such denser interlayer has temperature dependency of its own mobility, even without clear evidence of degradation of material itself. Its fact proven in a single film also reflects on multilayered PLED's performance like IVL, efficiency, lifetime. It's found that, especially, to enhance lifetime is related with thermal stability of interlayer and its mobility dependency to meet better charge balance. Therefore, it gives us understanding not only baking effect of interlayer, but also material & device designing guide to enhance lifetime.

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High Performance nFET Operation of Strained-SOI MOSFETs Using Ultra-thin Strained Si/SiGe on Insulator(SGOI) Substrate (초고속 구동을 위한 Ultra-thin Strained SGOI n-MOS 트랜지스터 제작)

  • 맹성렬;조원주;오지훈;임기주;장문규;박재근;심태헌;박경완;이성재
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1065-1068
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    • 2003
  • For the first time, high quality ultra-thin strained Si/SiGe on Insulator (SGOI) substrate with total SGOI thickness( $T_{Si}$ + $T_{SiGe}$) of 13 nm is developed to combine the device benefits of strained silicon and SOI. In the case of 6- 10 nm-thick top silicon, 100-110 % $I_{d,sat}$ and electron mobility increase are shown in long channel nFET devices. However, 20-30% reduction of $I_{d,sat}$ and electron mobility are observed with 3 nm top silicon for the same long channel device. These results clearly show that the FETs operates with higher performance due to the strain enhancement from the insertion of SiGe layer between the top silicon layer and the buried oxide(BOX) layer. The performance degradation of the extremely thin( 3 nm ) top Si device can be attributed to the scattering of the majority carriers at the interfaces.

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A study of an efficiency test for new style rail fastening system (신형레일체결장치의 성능평가)

  • Kim, Eun;Yang, Shin-Chu;Lee, Jong-Duk
    • Proceedings of the KSR Conference
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    • 2001.10a
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    • pp.494-499
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    • 2001
  • This research carried out the experimental manufacture of the improved fastening device and its performance test as well as the structural improvement of the prototype of a new type of fastening device developed through G7 Project during the first year of the second phase. Firstly, a supplementary design for each part of the prototype was carried out in order to improve its performance and a structural analysis in order to review the stress on the fastening spring. Secondly, another prototype was manufactured and then a performance test was carried out with the criteria used for the same kind of test on the authorized ones, both at home and abroad. Finally, the usability of the device was reviewed by comparing above-mentioned test result with that of those already under commercial use.

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Optimization of Heat Pump Systems (열펌프의 성능 최적화에 관한 연구)

  • Choi, Jong-Min;Yun, Rin;Kim, Yong-Chan
    • 한국신재생에너지학회:학술대회논문집
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    • 2007.11a
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    • pp.538-541
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    • 2007
  • An expansion device plays an important role in optimizing the heat pumps by controlling refrigerant flow and balancing the system pressures. Conventional expansion devices are being gradually replaced with electronic expansion valves due to increasing focus on comfort, energy conservation, and application of a variable speed compressor. In addition, the amount of refrigerant charge in a heat pump is another primary parameter influencing system performance. In this study, the flow characteristics of the expansion devices are analyzed, and the effects of refrigerant charge amount on the performance of the heat pump are investigated at various operating conditions. Cooling capacity of the heat pump system is strongly dependent on load conditions. The heat pump system is very sensitive with a variation of refrigerant charge amount. But, the performance of it can be optimized by adjusting the flow rate through expansion device to maintain a constant superheat at all test conditions.

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"Least Gain or Wrist Pain": A comparative study about performance and usability of mouse, trackball, and touchpad

  • Yunsun Alice Hong;Kwanghee Han
    • International Journal of Advanced Culture Technology
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    • v.11 no.2
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    • pp.298-309
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    • 2023
  • The mouse as an input device has undoubtedly brought convenience to users due to its intuitiveness and simplicity, but it also brought unprecedented issues such as carpal tunnel syndrome (CTS). As a result, the necessity of alternative input devices that put less strain on the wrist, while still providing the convenience of a conventional mouse, has emerged. Unfortunately, there have been several research about alternative devices to replace a mouse, however, they showed inconsistent results. This study suggests that those inconsistent results may stem from the type and the difficulty of tasks used in previous studies. Therefore, we designed this study to compare the performance and perceived workload of three input devices (Mouse/Trackball/Touchpad) in each condition in terms of task type (Targeting/Tracking) and difficulty level (Easy/Hard). The results indicated that there were significant performance differences and no significant workload differences among the three devices, and the interactions were observed in some conditions. These results can provide users with practical guidelines to choose the optimal input device according to their needs or purpose.

Optimization of InAlAs/InGaAs HEMT Performance for Microwave Frequency Applications and Reliability

  • Gupta, Ritesh;Aggarwal, Sandeep Kumar;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.3
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    • pp.240-249
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    • 2004
  • In the present paper efforts have been made to optimize InAlAs/InGaAs HEMT by enhancing the effective gate voltage ($(V_c-V_off)$) using pulsed doped structure from uniformly doped to delta doped for microwave frequency applications and reliability. The detailed design criteria to select the proper design parameters have also been discussed in detail to exclude parallel conduction without affecting the del ice performance. Then the optimized value of $V_c-V_off$and breakdown voltages corresponding to maximum value of transconductance has been obtained. These values are then used to predict the transconductance and cut-off frequency of the del ice for different channel depths and gate lengths.

Pentacene TFTs and Integrated Circuits with PVP as Gate Insulator

  • Xu, Yong-Xian;Byun, Hyun-Sook;Song, Chung-Kun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1027-1029
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    • 2004
  • In this paper, we have fabricated pentacene thin film transistors (TFTs) using polyvinylphenol (PVP) copolymer and cross-linked PVP as gate insulator on glass and plastic (PET) substrate. Depending on the density of PVP and cross-link material the performance has been changed. We obtained the best device performance with the mobility of 0.32cm2/V${\cdot}$sec and the on/off current ratio of 1.19${\times}$106 for the case of 10wt% PVP copolymer mixed with 5wt% poly (melamine-co-formaldehyde). Additionally using pentacene TFTs with the above PVP gate insulator, we fabricated the integrated circuits including inverter which produced the gain of 9.7.

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Study on the Development of Integrated Vibration and Sound Generator (휴대폰용 일체형 음향 및 진동 발생장치 개발을 위한 연구)

  • 신태명;안진철
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.13 no.11
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    • pp.875-881
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    • 2003
  • The received signal of a mobile phone is normally sensed through two independent means which are the sound generation of a speaker and vibration generation of a vibration motor. As an improvement scheme to meet the consumer's demand on weight reduction and miniaturization of a mobile phone, the design and development of an integrated vibration and sound generating device are performed in this research. To this purpose, the optimal shapes of the voice coil. the permanent magnet and the vibration plate are designed, and the excitation force applied to the vibration system of the new device is estimated and verified through theoretical analyses, computer simulation, and experiments using an expanded model. In addition, vibration performance comparison of the device with the existing vibration motor is performed, and from the overall process, therefore, the method and procedure for the vibration performance analysis of the integrated vibration and sound generating device are established.

N-Type Carbon-Nanotube MOSFET Device Profile Optimization for Very Large Scale Integration

  • Sun, Yanan;Kursun, Volkan
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.2
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    • pp.43-50
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    • 2011
  • Carbon-nanotube metal oxide semiconductor field effect transistor (CN-MOSFET) is a promising future device candidate. The electrical characteristics of 16 nm N-type CN-MOSFETs are explored in this paper. The optimum N-type CN-MOSFET device profiles with different number of tubes are identified for achieving the highest on-state to off-state current ratio ($I_{on}/I_{off}$). The influence of substrate voltage on device performance is also investigated in this paper. Tradeoffs between subthreshold leakage current and overall switch quality are evaluated with different substrate bias voltages. Technology development guidelines for achieving high-speed, low-leakage, area efficient, and manufacturable carbon nanotube integrated circuits are provided.

A Design Evaluation of Strained Si-SiGe on Insulator (SSOI) Based Sub-50 nm nMOSFETs

  • Nawaz, Muhammad;Ostling, Mikael
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.2
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    • pp.136-147
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    • 2005
  • A theoretical design evaluation based on a hydrodynamic transport simulation of strained Si-SiGe on insulator (SSOI) type nMOSFETs is reported. Although, the net performance improvement is quite limited by the short channel effects, simulation results clearly show that the strained Si-SiGe type nMOSFETs are well-suited for gate lengths down to 20 nm. Simulation results show that the improvement in the transconductance with decreasing gate length is limited by the long-range Coulomb scattering. An influence of lateral and vertical diffusion of shallow dopants in the source/drain extension regions on the device performance (i.e., threshold voltage shift, subthreshold slope, current drivability and transconductance) is quantitatively assessed. An optimum layer thickness ($t_{si}$ of 5 and $t_{sg}$ of 10 nm) with shallow Junction depth (5-10 nm) and controlled lateral diffusion with steep doping gradient is needed to realize the sub-50 nm gate strained Si-SiGe type nMOSFETs.