• The Journal of the Korea institute of electronic communication sciences
• /
• v.10 no.8
• /
• pp.921-926
• /
• 2015

For the over-heat protection purpose in power strip devices, over-current detection/protection circuits, such as bimetal, switching circuit, and microprocessor-based relay circuit, have been widely setup in high-end products. Most of these circuits are connected to the power line in parallel and, thus, they are sensitive to the line voltage and current distortion. Moreover, these protection circuits are often costly and, therefore, it is hard to meet the commercial requirements. A low-cost over-current detection circuit with the contactless current transducer is designed and tested in this paper. The detection circuit is galvanically isolated from the power line and, thus, less sensitive to the line voltage distortion. The experimental results show that the proposed circuit accurately operates despite of its simple structure and low-cost electronic parts.

• The Journal of The Korea Institute of Intelligent Transport Systems
• /
• v.11 no.4
• /
• pp.63-69
• /
• 2012

This paper describes novel scheme of a gray scale capacitive fingerprint image for high-accuracy capacitive sensor chip. The typical gray scale image scheme used a DAC of big size layout or charge-pump circuit of non-volatile memory with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit of charge sharing scheme is proposed, which uses DLC(down literal circuit) based on a neuron MOS(vMOS) and analog simple multiplexor. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, a pixel layout size can be reduced and the image resolution can be improved.

• Journal of Sensor Science and Technology
• /
• v.6 no.4
• /
• pp.280-289
• /
• 1997

The measure of motor speed using encoder is difficult to detect accurate speed and direction in very low speed because the intervals between an encoder pulse and pulse are long. So various speed estimation techniques were proposed to have the good dynamic performance in low speed. And direction detection is so important as speed measurement in very low speed. But because the conventional direction detection circuit check the direction only 1 time in 1 period of each encoder pulses, so it has long delayed detection time in very low speed, thus accurate detection of direction is difficult. In this paper, we propose a 2 way edge detection method which can detect at the rising and filling edge of each encoder pulses. So it can check the direction 4 times in 1 period of each encoder pulses. Therefore if we use proposed method, we can reduce the detection time as 1/4 than that of conventional circuit and can detect more accurate speed and direction. And computer simulation and experiment is performed to verify the perfomance and effect of proposed circuit and we analyze it's results by comparing with that of conventional circuit.

• Proceedings of the Korean Information Science Society Conference
• /
• 2011.06b
• /
• pp.313-316
• /
• 2011

SRAM-based FPGAs are very sensitive to single event upset(SEU) induced by space irradiation. To mitigate SEU effects, space applications employ some mitigation schemes. The triple modular redundancy(TMR) is a well-known mitigation scheme. It uses one or three voters as well as three identical blocks performing the same work. The voters can mask out one error in the outputs from the three replicated blocks. One SEU error in TMRed circuits can be masked but it needs to be detected for some reasons such as to analyze the SEU effects in the satellite or to recover the circuits from the error before additional error occur. In this paper, we developed a fault detection circuit and reporting system to detect a fault on the TMRed circuits. To verify our error detection circuit and reporting circuit, we performed an irradiation test at MC-50 Cyclotron. Experimental results showed that error detection circuit can detect a fault on the TMRed test circuit in radiation environment.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.15 no.6
• /
• pp.1343-1348
• /
• 2011

A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than a conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 47% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is layout without area increasing of a one pixel.

• Journal of information and communication convergence engineering
• /
• v.7 no.1
• /
• pp.66-71
• /
• 2009

A novel sensing scheme using resistive characteristics of the finger is proposed. ESD problem is more harmful than a capacitive fingerprint sensor in a resistive fingerprint sensor, because the sensor plate is directly connected to the sensing cell. The proposed circuit is more robust than conventional circuit for ESD. The sensor plate and sensing cell are isolated by capacitor. The pixel level simple detection circuit is fully digital operation unlike that of the capacitive sensing cell. The sensor circuit blocks are designed and simulated in a standard CMOS $0.35{\mu}m$ process. The proposed circuit is more stable and effective than a typical circuit.

• Proceedings of the KIPE Conference
• /
• 2006.06a
• /
• pp.254-256
• /
• 2006

A Novel way to support typical Thermal Shut Down(TSD) circuit is proposed. In power ICs, on-time or on-duration is the key factor to anticipate an abrupt increase of internal temperature. Such an abrupt raise of the temperature can cause TSD circuit cannot protect on proper time due to the temperature detection delay come from the physical distance or the imperfect coupling between heat sources and detector. The proposed circuit checks the duty ratio touched their maximum or not in every cycle. Once duty ratio touches the maximum duty, new circuit generates the warning signal to the TSD circuit and lowers pre-determined temperature for shut down to compensate the detection delay. The novel circuit will be analyzed to the transistor level and checked the validity by simulation.

• Journal of IKEEE
• /
• v.27 no.1
• /
• pp.45-52
• /
• 2023

Cold-junction correction(CJC) and disconnection detection circuit design of various thermocouples(TC) and multi-channel TC interface circuit using them were designed. The CJC and disconnection detection circuit consists of a CJC semiconductor device, an instrumentation amplifier(IA), two resistors and a diode for disconnection detection. Based on the basic circuit, a multi-channel interface circuit was also implemented. The CJC was implemented using compensation semiconductor and IA, and disconnection detection was detected by using two resistor and a diode so that IA input voltage became -0.42V. As a result of the experiment using R-type TC, the error of the designed circuit was reduced from 0.14mV to 3㎶ after CJC in the temperature range of 0℃ to 1400℃. In addition, it was confirmed that the output voltage of IA was saturated from 88mV to -14.2V when TC was disconnected from normal. The output voltage of the designed circuit was 0V to 10V in the temperature range of 0℃ to 1400℃. The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel. The implemented multi-channel interface has a feature that can be applied equally to E, J, K, T, R, and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.

• Journal of Sensor Science and Technology
• /
• v.14 no.1
• /
• pp.28-32
• /
• 2005

In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of $160{\times}192$ array sensing cells (12 by $12.7{\;}mm^{2}$). The chip was fabricated on a 0.35 m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95 V.

• Journal of Sensor Science and Technology
• /
• v.12 no.6
• /
• pp.231-240
• /
• 2003

The problem of power consumption and the limitation of a chip area should be considered when the pixel number of the edge detection circuit increases to fabricate a vision chip for edge detection with high resolution. The numeric increment of the unit circuit causes power consumption to increase and require a larger chip area. An increment of power consumption and a limitation of chip area with several ten milli-meters square supplied by the CMOS foundry company restrict the pixel numbers of the edge detection circuit. In this paper, we proposed a electronic switch to minimize the power consumption owing to the numeric increment of the edge detection circuit to realize a vision chip for edge detection with high resolution. We also applied a method by which photodetector and edge detection circuit are separated to implement a vision chip with a higher resolution. The photodetector circuit with $128{\times}128$ pixels uses a common edge detection circuit with $1{\times}128$ pixels so that resolution was improved at the same chip area. The chip size is $4mm{\times}4mm$ and the power consumption was confirmed to be about 20mW using SPICE.