• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.115-116
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• 2006

UWB 시스템은 실내 LBS 에 가장 유망한 기술로 각광받고 있다. 그러나 실내건물을 이루는 손실성 매질로 인해서 신호에 지연이 발생, 거리오차가 발생하게 된다. 본 문제를 해결하기 위해서 공기중의 채널과 매질의 채널정보를 통해서, 신호의 지연을 추정하려고 하였다. 신호의 스팩트럼의 주파수에 관한 손실기울기는 투과한 매질의 두께에 비례하여, 깊어진다는 것을 사용하여, 매질 투과로 인한 신호의 지연시간을 추정하는 기술과 손실기울기를 측정하기 위한 RAKE 수신기를 소개한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.7A
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• pp.762-769
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• 2007

Adaptive MIMO-OFDM (Orthogonal Frequency Division Multiplexing) system adaptively changes modulation scheme depending on feedback channel state information (CSI). The CSI feedback channel which is the reverse link channel has multiple symbol delays including propagation delay, processing delay, frame delay, etc. The unreliable CSI due to feedback delay degrades adaptive modulation system performance. This paper compares the MSE and data capacity with respect to delay and channel signal to noise ratio for the two multi-step channel prediction schemes, CTSBP and BTSBP, such that robust adaptive SISO-OFDM/MIMO-OFDM is designed over severe mobile multipath channel conditions. This paper presents an interpolation method to reduce feedback overhead for adaptive MIMO-OFDM and shows MSE with respect to interpolation interval.

• Journal of Korea Society of Industrial Information Systems
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• v.22 no.1
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• pp.53-59
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• 2017

This Paper Proposes a New High-speed Design Methodology for Delay Insensitive Asynchronous Circuits Combining with a Pseudo-NMOS Structure used for High Performance in Synchronous Circuits. Null Convention Logic(NCL) of Conventional Delay-Insensitive Asynchronous Design Methodologies has many Advantages of High Reliability, Low Power Consumption, and Easy Design Reuses not Dependant on Semiconductor Technology. However. the Conventional NCL Gates has a Complicated Stack Structure, so it Suffers from Increased Circuit Delay. Therefore, a New NCL Gates and its Pipeline Structure for High Performance, and the Proposed Methodology has been Designed and Evaluated by a $4{\times}4$ Multiplier Designed using SK-Hynix 0.18 um CMOS Technology. The Experimental Results are Compared with a Conventional NCL in Terms of Power and Delay and shows that the Propagation Delay of the Proposed Multiplier is Reduced by 85% Compared with the Conventional NCL Multiplier.

• Tunnel and Underground Space
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• v.24 no.1
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• pp.97-109
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• 2014

In order to identify the characteristics of the propagation depending on delay time (20, 25 ms) and priming location (top priming, middle priming, bottom priming), test blasts were carried out a total of 4 times using different spacing, burden, drilling length, charge per delay and was derived the formula to predict blast vibration. This study investigated the characteristics of vibration by analysis of the nomogram and prediction of Peak Particle Velocity (PPV) from delay time and priming location by the formula to predict ground vibration. And it analyzed the trends of vibration increase by standards charge 0.5, 1.6, 5, 15 kg. Standards charge is "Blasting design and construction guidelines to road construction" by the Ministry of Land, Infrastructure and Transport. Depending on the charge in favor of vibration control method is proposed. Thus, when the design was to be used as a variable.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.2
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• pp.291-298
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• 2023

SRAM-based in-memory computing is one of the technologies to solve the bottleneck of von Neumann architecture. In order to achieve SRAM-based in-memory computing, it is essential to design efficient SRAM bit-cell. In this paper, we propose a low-power differential sensing 8+T SRAM bit-cell which reduces power consumption and improves circuit performance. The proposed 8+T SRAM bit-cell is applied to ripple carry adder which performs SRAM read and bitwise operations simultaneously and executes each logic operation in parallel. Compared to the previous work, the designed 8+T SRAM-based ripple carry adder is reduced power consumption by 11.53%, but increased propagation delay time by 6.36%. Also, this adder is reduced power-delay-product (PDP) by 5.90% and increased energy-delay- product (EDP) by 0.08%. The proposed circuit was designed using TSMC 65nm CMOS process, and its feasibility was verified through SPECTRE simulation.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.5
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• pp.769-776
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• 2023

In this paper, we designed an MLSA(Match-line Sense Amplifier) for low-power CAM(Content Addressable Memory). By using the MLSA and precharge controller, we reduced power consumption during CAM operation by employing a selective match-line charging technique to mitigate power consumption caused by mismatch. Additionally, we further reduced power consumption due to leakage current by terminating precharge early when a mismatch occurs during the search operation. The designed circuit exhibited superior performance compared to the existing circuits, with a reduction of 6.92% and 23.30% in power consumption and propagation delay time, respectively. Moreover, it demonstrated a significant decrease of 29.92% and 52.31% in product-delay-product (PDP) and energy-delay-product (EDP). The proposed circuit was validated using SPECTRE simulation with TSMC 65nm CMOS process.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.2
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• pp.285-290
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• 2023

Compressors are widely used in high-speed electronic systems and are used to reduce the number of operands in multiplier. The proposed compressor is constructed based on the m-GDI(: modified gate diffusion input) to reduce the propagation delay time. This paper is compared the performance of compressors by applying 4-2, 5-2 and 6-2 m-GDI compressors to the multiplier, respectively. As a simulation results, compared to the 8-bit Dadda multiplier using the 4-2 and 6-2 compressor, the multiplier using the 5-2 compressor is reduced propagation delay time 13.99% and 16.26%, respectively. Also, the multiplier using the 5-2 compressor is reduced PDP(: Power Delay Product) 4.99%, 28.95% compared to 4-2 and 6-2 compressor, respectively. However, the multiplier using the 5-2 compression circuit is increased power consumption by 10.46% compared to the multiplier using the 4-2 compression circuit. In conclusion, the 8-bit Dadda multiplier using the 5-2 compressor is superior to the multipliers using the 4-2 and 6-2 compressors. The proposed circuit is implemented using TSMC 65nm CMOS process and its feasibility is verified through SPECTRE simulation.

• Journal of KIISE:Information Networking
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• v.34 no.5
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• pp.340-347
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• 2007

Vehicle safety service can be effectively achieved with inter-vehicle communication technologies, in which moving vehicles transmit a safety related urgency information such as traffic accidents, sudden stops, obstacle appearance etc. They usually utilize a broadcast of message propagation method because the communicating vehicles are not known each other. The pure broadcasting scheme does not satisfy the requirements of vehicle safety communication service due to the transmission delay with frequent message collisions. To resolve this problem, this paper presents a group based propagation method for the multi-hop transmission, in order to deliver an urgency message to the reasonable size of vehicle troop. A group header is elected in considering of the position information of vehicles and radio transmission range. And a vehicle equivalent group is formed with the header. With benefits of the group based transmission, it is possible to minimize the unnecessary transmission and the possibility of message collisions. Simulation results show that the message propagation performance is so stable regardless of vehicle's congestion degree.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.4
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• pp.736-742
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• 2003

This paper presents the propagation path loss in a tunnel which is a kinds of underground environments. To predict propagation path loss more accurately, we choose a straight tunnel with rectangular cross-section. The simulated receiver powers that are using a hybrid waveguide model and a Ray-Tracing method, are compared with the measured ones as a function of distance between TX and RX antennas in tunnel. The attenuation value of regression analysis for measured power in the tunnel is 0.0238dB/m which is similar to the one of the EH1.2 mode, 0.0246dB/m in hybrid waveguide model. By comparing simulation with measurement in tunnels, it has been shown that the measured values are approximate to the simulated results of ray-tracing model. In the analysis of wide-band channel characteristics of the tunnel, the more the distance between TX and RX antennas in tunnel increases, RMS delay spread increases and coherence bandwidth decreases.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.1B
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• pp.114-124
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• 2002

In this paper, we proposed the image-based 3D ray tracing indoor propagation model using a patch scattering model for fading analysis of indoor propagation environments. An image-based 3D ray tracing technique is mainly used, which allows the rapid generation of the complex channel impulse response for any given location and polarization of transmitter and receiver. Due to the site specific nature of indoor environment, we took into account the location and the electrical properties of individual walls and objects such as windows, doors and plaster board in our propagation model. Besides, the 3D radiation beam-patterns and polarizations of arbitrary antennas were considered, and using patch scattering model we can consider the change of the polarization due to the scattering from the various indoor objects, like desks, chairs and etc. the are almost impossible to be modeled with the basic image-based ray tracing method. The model will predict the impulse response, the rms delay spread, the fading characteristics of the channel and performances of the polarization diversity schemes.