• Title/Summary/Keyword: Deep reactive-ion-etching

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The Flow Analysis and Evaluation of the Peristaltic Micropump (마이크로 정량펌프의 유동해석과 작동성능 평가)

  • 박대섭;최종필;김병희;장인배;김헌영
    • Journal of the Korean Society for Precision Engineering
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    • v.21 no.2
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    • pp.195-202
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    • 2004
  • This paper presents the fabrication and evaluation of mechanical behavior for a peristaltic micropump by flow simulation. The valve-less micropump using the diffuser/nozzle is consists of the lower plate, the middle plate, the upper plate and the tube that connects inlet and outlet of the pump. The lower plate includes the channel and the chamber, and the plain middle plate are made of glass and actuated by the piezoelectric translator. Channels and a chamber on the lower plate are fabricated on high processability silicon wafer by the DRIE(Deep Reactive Ion Etching) process. The upper plate does the roll of a pump cover and has inlet/outlet/electric holes. Three plates are laminated by the aligner and bonded by the anodic bonding process. Flow simulation is performed using error-reduced finite volume method (FVM). As results of the flow simulation and experiments, the single chamber pump has severe flow problems, such as a backflow and large fluctuation of a flow rate. It is proved that the double-chamber micropump proposed in this paper can reduce the drawback of the single-chamber one.

The Pumping Characteristics of the Valveless Peristaltic Micropump by the Variation of Design Parameters

  • Chang, In-Bae;Park, Dae-Seob;Kim, Byeng-Hee;Kim, Heon-Young
    • KSTLE International Journal
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    • v.3 no.2
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    • pp.101-109
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    • 2002
  • This paper presents the fabrication and performance inspection of a peristaltic micropump by flow simulation. The valve-less micropump using the diffuser/nozzle is consists of base plate, mid plate, top plate and connection tubes fur inlet and outlet. In detail, the base plate is composed of two diffuser nozzles and three chambers, the mid plate consists of a glass diaphragm for the volumetric change of the pumping chamber. The inlet and outlet tubes are connected at the top plate and the actuator fur pressing the diaphragm is located beneath the top plate. The micropump is fabricated on the silicon wafer by DRIE (Deep Reactive ion Etching) process. The pumping performances are tested by the pneumatic test rig and compared with the simulated results fur various dimensions of diffuser nozzles. The pumping characteristics of the micropump by the volumetric change at the pumping chamber is modeled and simulated by the commercial software of FLOW-3D. The simulated results shows that reverse flow is the inherent phenomena in the diffuser nozzle type micropump, but it can be reduced at the dual pumping chamber model.

Design and Fabrication of MEMS Condenser Microphone Using Wafer Bonding Technology (기판접합기술을 이용한 MEMS 컨덴서 마이크로폰의 설계와 제작)

  • Kwon, Hyu-Sang;Lee, Kwang-Cheol
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.16 no.12 s.117
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    • pp.1272-1278
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    • 2006
  • This paper presents a novel MEMS condenser microphone with rigid backplate to enhance acoustic characteristics. The MEMS condenser microphone consists of membrane and backplate chips which are bonded together by gold-tin(Au/Sn) eutectic solder bonding. The membrane chip has $2.5mm{\times}2.5mm$, 0.5${\mu}m$ thick low stress silicon nitride membrane, $2mm{\times}2mm$ Au/Ni/Cr membrane electrode, and 3${\mu}m$ thick Au/Sn layer. The backplate chip has $2mm{\times}2mm$, 150${\mu}m$ thick single crystal silicon rigid backplate, $1.8mm{\times}1.8mm$ backplate electrode, and air gap, which is fabricated by bulk micromachining and silicon deep reactive ion etching. Slots and $50{\sim}60{\mu}m$ radius circular acoustic holes to reduce air damping are also formed in the backplate chip. The fabricated microphone sensitivity is 39.8 ${\mu}V/Pa$(-88 dB re. 1 V/Pa) at 1 kHz and 28 V polarization voltage. The microphone shows flat frequency response within 1 dB between 20 Hz and 5 kHz.

The Development of Cl-Plasma Etching Procedure for Si and SiO$_2$

  • Kim, Jong-Woo;Jung, Mi-Young;Park, Sung-Soo;Boo, Jin-Hyo
    • Journal of Surface Science and Engineering
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    • v.34 no.5
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    • pp.516-521
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    • 2001
  • Dry etching of Si wafer and $SiO_2$ layers was performed using He/Cl$_2$ mixture plasma by diode-type reactive ion etcher (RIE) system. For Si etching, the Cl molecules react with the Si molecules on the surface and become chemically stable, indicating that the reactants need energetic ion bombardment. During the ion assisted desorption, energetic ions would damage the photoresist (PR) and produce the bad etch Si-profile. Moreover, we have examined the characteristics of the Cl-Si reaction system, and developed the new fabrication procedures with a $Cl_2$/He mixture for Si and $SiO_2$-etching. The developed novel fabrication procedure allows the RIE to be unexpensive and useful a Si deep etching system. Since the etch rate was proved to increase linearly with fHe and the selectivity of Si to $SiO_2$ etch rate was observed to be inversely proportional to fHe.

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Enhanced Cathodoluminescence of KOH-treated InGaN/GaN LEDs with Deep Nano-Hole Arrays

  • Doan, Manh-Ha;Lee, Jaejin
    • Journal of the Optical Society of Korea
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    • v.18 no.3
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    • pp.283-287
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    • 2014
  • Square lattice nano-hole arrays with diameters and periodicities of 200 and 500 nm, respectively, are fabricated on InGaN/GaN blue light emitting diodes (LEDs) using electron-beam lithography and inductively coupled plasma reactive ion etching processes. Cathodoluminescence (CL) investigations show that light emission intensity from the LEDs with the nano-hole arrays is enhanced compared to that from the planar sample. The CL intensity enhancement factor decreases when the nano-holes penetrate into the multiple quantum wells (MQWs) due to the plasma-induced damage and the residues. Wet chemical treatment using KOH solution is found to be an effective method for light extraction from the nano-patterned LEDs, especially, when the nano-holes penetrate into the MQWs. About 4-fold CL intensity enhancement factor is achieved by the KOH treatments after the dry etching for the sample with a 250-nm deep nano-hole array.

Study on the Silicon Nano-needle Structure for Nano floating Gate Memory Application (나노 부유 게이트 메모리 소자 응용을 위한 실리콘 나노-바늘 구조에 관한 연구)

  • Jung, Sung-Wook;Yoo, Jin-Su;Kim, Young-Kuk;Kim, Kyung-Hae;Yi, Jun-Sin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.12
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    • pp.1069-1074
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    • 2005
  • In this work, nano-needle structures ate formed to solve problem, related to low density of quantum dots for nano floating gate memory. Such structures ate fabricated and electrical properties' of MIS devices fabricated on the nano-structures are studied. Nano floating gate memory based on quantum dot technologies Is a promising candidate for future non-volatile memory devices. Nano-structure is fabricated by reactive ion etching using $SF_6$ and $O_2$ gases in parallel RF plasma reactor. Surface morphology was investigated after etching using scanning electron microscopy Uniform and packed deep nano-needle structure is established under optimized condition. Photoluminescence and capacitance-voltage characteristics were measured in $Al/SiO_2/Si$ with nano-needle structure of silicon. we have demonstrated that the nano-needle structure can be applicable to non-volatile memory device with increased charge storage capacity over planar structures.

Fabrication of Colloid Thrusters using MEMS Technology

  • Park, Kun Joong;Song, Seung Jin;Sanchez, Manuel Martinez
    • Proceedings of the Korean Society of Propulsion Engineers Conference
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    • 2004.03a
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    • pp.588-592
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    • 2004
  • This paper presents the preliminary fabrication results of colloid thrusters which can provide thrust of the order of micro to milli-Newtons. MEMS technology has been used for fabrication, and four essential fabrication techniques - deep etching with nested masks, isotropic plasma etching, anisotropic reactive ion etching, and direct fusion wafer bonding - have been newly developed. Among diverse models which have been designed and fabricated, the fabrication results of 4-inch wafer-based colloid thrusters are presented.

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Design and Fabrication of Electrostatic Inkjet Head using Silicon Micromachining Technology

  • Kim, Young-Min;Son, Sang-Uk;Choi, Jae-Yong;Byun, Do-Young;Lee, Suk-Han
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.121-127
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    • 2008
  • This paper presents design and fabrication of optimized geometry structure of electrostatic inkjet head. In order to verify effect of geometry shape, we simulate electric field intensity according to the head structure. The electric field strength increases linearly with increasing height of the micro nozzle. As the nozzle diameter decreases, the electric field along the periphery of the meniscus can be more concentrated. We design and fabricate the electrostatic inkjet heads, hole type and pole type, with optimized structure. It was fabricated using thick-thermal oxidation and silicon micromachining technique such as the deep reactive ion etching (DRIE) and chemical wet etching process. It is verified experimentally that the use of the MEMS inkjet head allows a stable and sustainable micro-dripping mode of droplet ejection. A stable micro dripping mode of ejection is observed under the voltages 2.5 kV and droplet diameter is $10\;{\mu}m$.

The Effect of Mask Patterns on Microwire Formation in p-type Silicon (P-형 실리콘에서 마이크로 와이어 형성에 미치는 마스크 패턴의 영향)

  • Kim, Jae-Hyun;Kim, Kang-Pil;Lyu, Hong-Kun;Woo, Sung-Ho;Seo, Hong-Seok;Lee, Jung-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.418-418
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    • 2008
  • The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

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IC Thermal Management Using Microchannel Liquid Cooling Structure with Various Metal Bumps (금속 범프와 마이크로 채널 액체 냉각 구조를 이용한 소자의 열 관리 연구)

  • Won, Yonghyun;Kim, Sungdong;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.2
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    • pp.73-78
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    • 2016
  • An increase in the transistor density of integrated circuit devices leads to a very high increase in heat dissipation density, which causes a long-term reliability and various thermal problems in microelectronics. In this study, liquid cooling method was investigated using straight microchannels with various metal bumps. Microchannels were fabricated on Si wafer using deep reactive ion etching (DRIE), and Ag, Cu, or Cr/Au/Cu metal bumps were placed on Si wafer by a screen printing method. The surface temperature of liquid cooling structures with various metal bumps was measured by infrared (IR) microscopy. For liquid cooling with Cr/Au/Cu bumps, the surface temperature difference before and after liquid cooling was $45.2^{\circ}C$ and the power density drop was $2.8W/cm^2$ at $200^{\circ}C$ heating temperature.