• Journal of the Korea Institute of Building Construction
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• v.23 no.2
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• pp.197-207
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• 2023

Concrete is a widely used material due to its excellent compressive strength and durability. However, depending on the surrounding environment and the characteristics of the materials used in the construction, various defects may occur, such as cracks on the surface and subsidence of the structure. The detects on the surface of the concrete structure occur after completion or over time. Neglecting these cracks may lead to severe structural damage, necessitating regular safety inspections. Traditional visual inspections of concrete walls are labor-intensive and expensive. This research presents a deep learning-based semantic segmentation model designed to detect cracks in concrete walls. The model addresses surface defects that arise from aging, and an image augmentation technique is employed to enhance feature extraction and generalization performance. A dataset for semantic segmentation was created by combining publicly available and self-generated datasets, and notable semantic segmentation models were evaluated and tested. The model, specifically trained for concrete wall fracture detection, achieved an extraction performance of 81.4%. Moreover, a 3% performance improvement was observed when applying the developed augmentation technique.

• International conference on construction engineering and project management
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• 2022.06a
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• pp.784-791
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• 2022

Tack coat is a thin layer of asphalt between the existing pavement and asphalt overlay. During construction, insufficient tack coat layering can later cause surface defects such as slippage, shoving, and rutting. This paper proposed a method for tack coat inspection improvement using an unmanned aerial vehicle (UAV) and deep learning neural network for automatic non-uniform assessment of the applied tack coat area. In this method, the drone-captured images are exploited for assessment using a combination of Mask R-CNN and Grey Level Co-occurrence Matrix (GLCM). Mask R-CNN is utilized to detect the tack coat region and segment the region of interest from the surroundings. GLCM is used to analyze the texture of the segmented region and measure the uniformity and non-uniformity of the tack coat on the existing pavements. The results of the field experiment showed both the intersection over union of Mask R-CNN and the non-uniformity measured by GLCM were promising with respect to their accuracy. The proposed method is automatic and cost-efficient, which would be of value to state Departments of Transportation for better management of their work in pavement construction and rehabilitation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.11
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• pp.1294-1303
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• 1988

Electron and hole traps in semi-insulating GaAs with activation energies ({\Delta}E_r) ranging from 0.16 $\pm$ 0.01 to 0.98 $\pm$ 0.01 eV, have been detected and characterized by photo-induced current transient measurements. SI undoped GaAs has fewer deep levels than SI GaAs: Cr. The thermal capture cross section and density of the traps have been estimated and some of the centers have been related to native defects. In particular, the activation energy of the compensating Cr, and "0" levels in semi-insulating GaAs were accurately measured. The transient measurements were complemented by Hall measurements at T > 300K and photocurrent spectra measurements. The transition energies for the deep compensating levels obtained by the analyses of data from these measurements, when compared with those from the transient measurements, indicate negligible lattice-coupling of these centers. Analysis of the transport data also indicates that neutral impurity scattering plays a significant role in semi-insulating materials at high temperatures.

• Smart Structures and Systems
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• v.31 no.4
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• pp.383-392
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• 2023

Post-earthquake building condition assessment is crucial for subsequent rescue and remediation and can be automated by emerging computer vision and deep learning technologies. This study is based on an endeavour for the 2nd International Competition of Structural Health Monitoring (IC-SHM 2021). The task package includes five image segmentation objectives - defects (crack/spall/rebar exposure), structural component, and damage state. The structural component and damage state tasks are identified as the priority that can form actionable decisions. A multi-task Convolutional Neural Network (CNN) is proposed to conduct the two major tasks simultaneously. The rest 3 sub-tasks (spall/crack/rebar exposure) were incorporated as auxiliary tasks. By synchronously learning defect information (spall/crack/rebar exposure), the multi-task CNN model outperforms the counterpart single-task models in recognizing structural components and estimating damage states. Particularly, the pixel-level damage state estimation witnesses a mIoU (mean intersection over union) improvement from 0.5855 to 0.6374. For the defect detection tasks, rebar exposure is omitted due to the extremely biased sample distribution. The segmentations of crack and spall are automated by single-task U-Net but with extra efforts to resample the provided data. The segmentation of small objects (spall and crack) benefits from the resampling method, with a substantial IoU increment of nearly 10%.

• Korean Journal of Materials Research
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• v.9 no.5
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• pp.460-466
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• 1999

The deep level electron traps in AP-MOCVD GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures have been investigated by means of Deep Level Transient Spectroscopy DLTS). In terms of the experimental procedure, GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures were deposited on 2" undoped semi-insulating GaAs wafers by the AP-MOCVD method at $650^{\circ}C$ with TMGa, AsH3, TMAl, and SiH4 gases. The n-type GaAs conduction layers were doped with Si to the target concentration of about 2$\times$10\ulcornercm\ulcorner. The Al content was targeted to x=0.5 and the thicknesses of Al\ulcornerGa\ulcornerAs layers were targeted from 0 to 40 nm. In order to investigate the electrical characteristics, an array of Schottky diodes was built on the heterostructures by the lift-off process and Al thermal evaporation. Among the key results of this experiment, the deep level electron traps at 0.742~0.777 eV and 0.359~0.680 eV were observed in the heterostructures; however, only a 0.787 eV level was detected in n-type GaAs samples without the Al\ulcornerGa\ulcornerAs overlayer. It may be concluded that the 0.787 eV level is an EL2 level and that the 0.742~0.777 eV levels are related to EL2 and residual oxygen impurities which are usually found in MOCVD GaAs and Al\ulcornerGa\ulcornerAs materials grown at $630~660^{\circ}C$. The 0.359~0.680 eV levels may be due to the defects related with the al-O complex and residual Si impurities which are also usually known to exist in the MOCVD materials. Particularly, as the Si doping concentration in the n-type GaAs layer increased, the electron trap concentrations in the heterostructure materials and the magnitude of the C-V hysteresis in the Schottky diodes also increased, indicating that all are intimately related.ated.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.180-180
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• 2010

Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.

• Current Photovoltaic Research
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• v.11 no.3
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• pp.87-95
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• 2023

As the demand for the Internet of Things grows, research into indoor photovoltaics for wireless power is becoming important. In particular, perovskite has attracted considerable attention due to its superior performance compared to other candidates. However, various surface defects present in perovskite are a limiting factor for high performance. In particular, deep-level surface defects caused by uncoordinated Pb²⁺ ions directly limit charge transport. In low light environments, this appears to be a more significant hurdle. In this study, ethylenediamine, which can provide covalent bonding to uncoordinated Pb²⁺ ions through nitrogen, was used as a surface treatment material for indoor photovoltaics. X-ray photoelectron spectroscopy confirmed that the uncoordinated Pb²⁺ ions were effectively passivated by the terminal nitrogen of ethylenediamine. As a consequence, a V_OC of 0.998 V, a JSC of 0.139 mA cm^-2 and a fill factor of 83.03% were achieved, resulting in an indoor photoelectric conversion efficiency of 38.02%.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.327-327
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• 2009

ZnO with a large band gap (~3.37 eV) and exciton binding energy (~60 meV), is suitable for optoelectronic applications such as ultraviolet (UV) light emitting diodes (LEDs) and detectors. However, the ZnO-based p-n homojunction is not readily available because it is difficult to fabricate reproducible p-type ZnO with high hall concentration and mobility. In order to solve this problem, there have been numerous attempts to develop p-n heterojunction LEDs with ZnO as the n-type layer. The n-ZnO/p-GaN heterostructure is a good candidate for ZnO-based heterojunction LEDs because of their similar physical properties and the reproducible availability of p-type GaN. Especially, the reduced lattice mismatch (~1.8 %) and similar crystal structure result in the advantage of acquiring high performance LED devices. In particular, a number of ZnO films show UV band-edge emission with visible deep-level emission, which is originated from point defects such as oxygen vacancy, oxygen interstitial, zinc interstitial[1]. Thus, defect-related peak positions can be controlled by variation of growth or annealing conditions. In this work, the undoped ZnO film was grown on the p-GaN:Mg film using RF magnetron sputtering method. The undoped ZnO/p-GaN:Mg heterojunctions were annealed in a horizontal tube furnace. The annealing process was performed at $800^{\circ}C$ during 30 to 90 min in air ambient to observe the variation of the defect states in the ZnO film. Photoluminescence measurements were performed in order to confirm the deep-level position of the ZnO film. As a result, the deep-level emission showed orange-red color in the as-deposited film, while the defect-related peak positions of annealed films were shifted to greenish side as increasing annealing time. Furthermore, the electrical resistivity of the ZnO film was decreased after annealing process. The I-V characteristic of the LEDs showed nonlinear and rectifying behavior. The room-temperature electroluminescence (EL) was observed under forward bias. The EL showed a weak white and strong yellowish emission colors (~575 nm) in the undoped ZnO/p-GaN:Mg heterojunctions before and after annealing process, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.62-66
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• 2002

The conventional floating zone(FZ) crystal and Czochralski(CZ) silicon crystal have resistivity variations longitudinally as well as radially The resistivity variations of the conventional FZ and CZ crystal are not conformed to requirement of dopant distribution for power devices and thyristors. These resistivity variations in conventional cystals limits the reverse breakdown voltage that could be achieved and forced designers of high power diodes and thyristors to compromise the desired current-voltage characteristics. So to produce high Power diodes and thyristors, Neutron Transmutation Doping(NTD) technique is the one method just because NTD silicon provides very homogeneous distribution of doping concentration. This procedure involves the nuclear transmutation of silicon to phosphorus by bombardment of neutron to the crystal according to the reaction $^{30}$ Si(n,${\gamma}$)longrightarrow$^{31}$ Silongrightarrow(2.6 hr)$^{31}$ P+$\beta$$^{[-10]}$ . The radioactive isotope $^{31}$ Si is formed by $^{31}$ Si capturing a neutron, which then decays into the stable $^{31}$ P isotope (i.e., the donor atom), whose distribution is not dependent on the crystal growth parameters. In this research, neutron was irradiated on FZ silicon wafers which had high resistivity(1000~2000 Ω cm), for 26 and 8.3hours for samples of HTS-1 and HTS-2, and 13, 3.2, 2.0 hours for samples of IP-1, IP-2 and IP-3, respectively, to compare resistivity changes due to time differences. The designed resistivities were approached, which were 2.l Ωcm for HTS-1, 7.21 Ω cm for HTS-2, 1.792cm for IP-1, 6.83 Ωcm for IP-2, 9.23 Ωcm for IP-3, respectively. Point defects were investigated with Deep Level Transient Spectroscopy(DLTS). Four different defects were observed at 80K, 125K, 230K, and above 300K.

• Proceedings of the Materials Research Society of Korea Conference
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• 1995.11a
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• pp.23-24
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• 1995

기존의 웨이퍼 박막속에 절연박막이 삽입된 SOI(Silicon On Insulator) 웨이퍼 구조와 관련한 반도체 기판 재료가 커다른 관심을 끌어 왔으나, SOI 평가기술은 아직까지 체계적으로 확립된 것이 없으며, DLTS(Deep Level Transient Spectroscopy) 등을 이용한 전기적 평가는 거의 이루어지지 않은 상태이다. 본 연구에서는 직접접합된 웨이퍼를 약 10um내외의 활성화층을 형성시킨 6인치 P-형 SOI 웨이퍼를 제작하여 DLTS로 측정, 평가를 하였고, DLTS 측정후 관찰될 수 있는 에어지 트랩(Energy Trap)과 후속 열처리에서의 트랩의 변화등을 관찰하여, 후속 열처리조건에 따른 접합된 SOI 웨이퍼 계면의 안정화된 조건을 확보하였다.