• Title/Summary/Keyword: Data Memory

Search Result 3,302, Processing Time 0.03 seconds

An Experimental Study on Physiological and Psychological Effects of Pine Scent (소나무 향기의 생리 심리적 효과에 관한 실험적 연구)

  • Jo, Hyun-Ju;Fujii, Eijiro;Cho, Tae-Dong
    • Journal of the Korean Institute of Landscape Architecture
    • /
    • v.38 no.4
    • /
    • pp.1-10
    • /
    • 2010
  • The scientific verification of the physiological and psychological effects that result from interaction with green plants would not only provide objective knowledge on the psychological effect of green but would also establish useful grounds for the creation of green spaces that consider human emotions. The present study measured the cerebral activity(cerebral blood flow) and the autonomic nervous system activity (blood pressure, pulse rate, amylase) of fifteen Korean male subjects as they inhaled the natural scent diffused by pine needles. Impression and mood state evaluations of the reactions to the pine scent were carried out using the SD method and POMS. Cerebral activity was observed to be significantly activated in the feeling, judgment, and motor areas of the frontal lobe, as well as the memory area in the temporal lobe. Verbal evaluations by the SD method and POMS indicated a pine scent left natural but stimulated and active impressions, provided vigor, and also reduced confusion. The autonomic nervous system activities, however, showed no significant differences. These findings verified scientifically that a pine scent vitalizes humans both physiologically and psychologically. These results could be useful as fundamental data for the design of green spaces that consider human emotional aspects.

Optimized DSP Implementation of Audio Decoders for Digital Multimedia Broadcasting (디지털 방송용 오디오 디코더의 DSP 최적화 구현)

  • Park, Nam-In;Cho, Choong-Sang;Kim, Hong-Kook
    • Journal of Broadcast Engineering
    • /
    • v.13 no.4
    • /
    • pp.452-462
    • /
    • 2008
  • In this paper, we address issues associated with the real-time implementation of the MPEG-1/2 Layer-II (or MUSICAM) and MPEG-4 ER-BSAC decoders for Digital Multimedia Broadcasting (DMB) on TMS320C64x+ that is a fixed-point DSP processor with a clock speed of 330 MHz. To achieve the real-time requirement, they should be optimized in different steps as follows. First of all, a C-code level optimization is performed by sharing the memory, adjusting data types, and unrolling loops. Next, an algorithm level optimization is carried out such as the reconfiguration of bitstream reading, the modification of synthesis filtering, and the rearrangement of the window coefficients for synthesis filtering. In addition, the C-code of a synthesis filtering module of the MPEG-1/2 Layer-II decoder is rewritten by using the linear assembly programming technique. This is because the synthesis filtering module requires the most processing time among all processing modules of the decoder. In order to show how the real-time implementation works, we obtain the percentage of the processing time for decoding and calculate a RMS value between the decoded audio signals by the reference MPEG decoder and its DSP version implemented in this paper. As a result, it is shown that the percentages of the processing time for the MPEG-1/2 Layer-II and MPEG-4 ER-BSAC decoders occupy less than 3% and 11% of the DSP clock cycles, respectively, and the RMS values of the MPEG-1/2 Layer-II and MPEG-4 ER-BSAC decoders implemented in this paper all satisfy the criterion of -77.01 dB which is defined by the MPEG standards.

Implementation of a TCP/IP Offload Engine Using Lightweight TCP/IP on an Embedded System (임베디드 시스템상에서 Lightweight TCP/IP를 이용한 TCP/IP Offload Engine의 구현)

  • Yoon In-Su;Chung Sang-Hwa;Choi Bong-Sik;Jun Yong-Tae
    • Journal of KIISE:Computer Systems and Theory
    • /
    • v.33 no.7
    • /
    • pp.413-420
    • /
    • 2006
  • The speed of present-day network technology exceeds a gigabit and is developing rapidly. When using TCP/IP in these high-speed networks, a high load is incurred in processing TCP/IP protocol in a host CPU. To solve this problem, research has been carried out into TCP/IP Offload Engine (TOE). The TOE processes TCP/IP on a network adapter instead of using a host CPU; this reduces the processing burden on the host CPU. In this paper, we developed two software-based TOEs. One is the TOE implementation using an embedded Linux. The other is the TOE implementation using Lightweight TCP/IP (lwIP). The TOE using an embedded Linux did not have the bandwidth more than 62Mbps. To overcome the poor performance of the TOE using an embedded Linux, we ported the lwIP to the embedded system and enhanced the lwIP for the high performance. We eliminated the memory copy overhead of the lwIP. We added a delayed ACK and a TCP Segmentation Offload (TSO) features to the lwIP and modified the default parameters of the lwIP for large data transfer. With the aid of these modifications, the TOE using the modified lwIP shows a bandwidth of 194 Mbps.

Randomness based Static Wear-Leveling for Enhancing Reliability in Large-scale Flash-based Storage (대용량 플래시 저장장치에서 신뢰성 향상을 위한 무작위 기반 정적 마모 평준화 기법)

  • Choi, Kilmo;Kim, Sewoog;Choi, Jongmoo
    • KIISE Transactions on Computing Practices
    • /
    • v.21 no.2
    • /
    • pp.126-131
    • /
    • 2015
  • As flash-based storage systems have been actively employed in large-scale servers and data centers, reliability has become an indispensable element. One promising technique for enhancing reliability is static wear-leveling, which distributes erase operations evenly among blocks so that the lifespan of storage systems can be prolonged. However, increasing the capacity makes the processing overhead of this technique non-trivial, mainly due to searching for blocks whose erase count would be minimum (or maximum) among all blocks. To reduce this overhead, we introduce a new randomized block selection method in static wear-leveling. Specifically, without exhaustive search, it chooses n blocks randomly and selects the maximal/minimal erased blocks among the chosen set. Our experimental results revealed that, when n is 2, the wear-leveling effects can be obtained, while for n beyond 4, the effect is close to that obtained from traditional static wear-leveling. For quantitative evaluation of the processing overhead, the scheme was actually implemented on an FPGA board, and overhead reduction of more than 3 times was observed. This implies that the proposed scheme performs as effectively as the traditional static wear-leveling while reducing overhead.

Study on the Process and Roles of Sibling Caregiving for People with Chronically Mentally Illness (만성정신질환자 형제자매의 보호자 됨의 과정과 그 역할유형에 관한 연구)

  • Choi, Myung Min;Kwon, Ja Young
    • Korean Journal of Social Welfare
    • /
    • v.64 no.4
    • /
    • pp.311-336
    • /
    • 2012
  • Under the Korean mental health circumstances where familistic culture is predominant and social resources are limited, siblings are an important presence that effect chronically mentally ill people's lives. Despite this fact, our society in some aspect overlooks their importance. Therefore, this study is focused on the role of siblings as caregivers of chronically mentally ill adults and is conducted to understand the relevant process and types of how siblings fulfill the role of caregivers. In order to achieve this goal, data was collected from nine study participants through individual interviews and focus group interviews and its contents were analyzed according to Grounded Theory. The results revealed that the siblings' experiences as caregivers of chronically mentally ill people were mainly categorized as 'carrying painful memory, responsibility, and concern about the obscure future of the mentally ill sibling and finding a caring role different from those of parents.' Moreover three types of sibling caregivers were recognized: 'reality-adapting, obligation fulfilling' type, 'sacrificial self-responsibility fulfilling' type, and 'growing guardianship creator' type. This research aimed to vividly deliver the voices of research participants and proposed social support and permanent planning services based on the experiences and desires unique to siblings.

  • PDF

An Efficient Packetization Method for the Real-time Internet Video Transmission (실시간 인터넷 동영상 전송을 위한 효율적인 패킷화 기법)

  • Kim Hyo-Hyun;Yoo Kook-Yeol
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.31 no.6C
    • /
    • pp.614-622
    • /
    • 2006
  • In this paper, we propose an efficient packetization method to reduce the packetization overhead. For the purpose, we firstly verify the relationship between packet length and packet loss rate. The empirical results show that as the packet length is larger than the path MTU, the packet loss rate is drastically increased, producing poor visual quality at the receiver side. However, as the length of the packet is reduced, we should transmit more packets per frame and the packetization overhead will be increased. This increase in the packetization overhead reduces the number of bits allocated to the video data, resulting in the low visual quality. Therefore, each packet should be packetized to have the packet length close to the path MTU. In this paper, we show that the this process of the packetization with the constraint on the packet length is very similar to the dynamic storage allocation in the operating system. We had thoroughly surveyed the dynamic storage allocation methods used in the recent operating systems and propose to use the allocation methods for the video packetization. We empirically show that the proposed method can reduce the packetization overhead upto 28.3%, compared with the conventional sequential packetization method which have been widely used in Internet video transmission.

Deposition Process Load Balancing Analysis through Improved Sequence Control using the Internet of Things (사물인터넷을 이용한 증착 공정의 개선된 순서제어의 부하 균등의 해석)

  • Jo, Sung-Euy;Kim, Jeong-Ho;Yang, Jung-Mo
    • Journal of Digital Convergence
    • /
    • v.15 no.12
    • /
    • pp.323-331
    • /
    • 2017
  • In this paper, four types of deposition control processes such as temperature, pressure, input/output(I/O), and gas were replaced by the Internet of Things(IoT) to analyze the data load and sequence procedure before and after the application of it. Through this analysis, we designed the load balancing in the sensing area of the deposition process by creating the sequence diagram of the deposition process. In order to do this, we were modeling of the sensor I/O according to the arrival process and derived the result of measuring the load of CPU and memory. As a result, it was confirmed that the reliability on the deposition processes were improved through performing some functions of the equipment controllers by the IoT. As confirmed through this paper, by applying the IoT to the deposition process, it is expected that the stability of the equipment will be improved by minimizing the load on the equipment controller even when the equipment is expanded.

Design of a Low Power Digital Filter Using Variable Canonic Signed Digit Coefficients (가변 CSD 계수를 이용한 저전력 디지털 필터의 설계)

  • Kim, Yeong-U;Yu, Jae-Taek;Kim, Su-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.38 no.7
    • /
    • pp.455-463
    • /
    • 2001
  • In this Paper, an approximate processing method is proposed and tested. The proposed method uses variable CSD (VCSD) coefficients which approximate filter stopband attenuation by controlling the precision of the CSD coefficient sets. A decimation filter for Audio Codec '97 specifications has been designed having processor architecture that consists of program/data memory, arithmetic unit, energy/level decision, and sinc filter blocks, and fabricated with 0.6${\mu}{\textrm}{m}$ CMOS sea-of-gate technology. For the combined two halfband FIR filters in decimation filter, the number of addition operations were reduced to 63.5%, 35.7%, and 13.9%, compared to worst-case which is not an adaptive one. Experimental results show that the total power reduction rate of the filter is varying from 3.8 % to 9.0 % with respect to worst-case. The proposed approximate processing method using variable CSD coefficients is readily applicable to various kinds of filters and suitable, especially, for the speech and audio applications, like oversampling ADCs and DACs, filter banks, voice/audio codecs, etc.

  • PDF

Inverse Characterization Method Based on 9 Channel Tone Response Curves for Display Device (디스플레이 장치를 위한 9개 채널 계조 응답 곡선에 기반한 역 특성화 기법)

  • Im, Hye-Bong;Cho, Yang-Ho;Park, Kee-Hyon;Ha, Yeong-Ho
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.42 no.5 s.305
    • /
    • pp.85-94
    • /
    • 2005
  • Display characterization, deriving the relationship between digital input values and the corresponding CIEXYZ tri-stimulus values, is important to reproduce the accurate color in color management system. The relationship can be estimated from the nine channel TRCs(tone response curves) and the result of this characterization method is better than that of using three channel TRCs. However, the inverse display characterization using nine channel TRCs cannot be directly inverted because the CIEXYZ values corresponding to each of RGB values are inseparable. Accordingly, inverse display characterization is usually implemented by the 3D-LUT (look-up table) method. Although the result of 3B-LUT is accurate, creating the 3D-LUT requires a lot of memory space and considerable amount of measurements. Therefore the inverse characterization method is proposed based on the modeling of channel-dependent values and nine channel inverse process based on the GOG(gain, offset gamma) model. The proposed method enhances the accuracy of display characterization and reduces the complexity and the number of measurements data required for accuracy in 3-D LUT.

High Bit-Rates Quantization of the First-Order Markov Process Based on a Codebook-Constrained Sample-Adaptive Product Quantizers (부호책 제한을 가지는 표본 적응 프로덕트 양자기를 이용한 1차 마르코프 과정의 고 전송률 양자화)

  • Kim, Dong-Sik
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.49 no.1
    • /
    • pp.19-30
    • /
    • 2012
  • For digital data compression, the quantization is the main part of the lossy source coding. In order to improve the performance of quantization, the vector quantizer(VQ) can be employed. The encoding complexity, however, exponentially increases as the vector dimension or bit rate gets large. Much research has been conducted to alleviate such problems of VQ. Especially for high bit rates, a constrained VQ, which is called the sample-adaptive product quantizer(SAPQ), has been proposed for reducing the hugh encoding complexity of regular VQs. SAPQ has very similar structure as to the product VQ(PQ). However, the quantizer performance can be better than the PQ case. Further, the encoding complexity and the memory requirement for the codebooks are lower than the regular full-search VQ case. Among SAPQs, 1-SAPQ has a simple quantizer structure, where each product codebook is symmetric with respect to the diagonal line in the underlying vector space. It is known that 1-SAPQ shows a good performance for i.i.d. sources. In this paper, a study on designing 1-SAPQ for the first-order Markov process. For an efficient design of 1-SAPQ, an algorithm for the initial codebook is proposed, and through the numerical analysis it is shown that 1-SAPQ shows better quantizer distortion than the VQ case, of which encoding complexity is similar to that of 1-SAPQ, and shows distortions, which are close to that of the DPCM(differential pulse coded modulation) scheme with the Lloyd-Max quantizer.