• Title/Summary/Keyword: Data Memory

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Development of Conducting Shape Memory Polymer Actuators (전도성 형상 기억 폴리머 작동기의 개발)

  • 백일현;윤광준;조재환;구남서
    • Journal of Institute of Control, Robotics and Systems
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    • v.10 no.11
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    • pp.976-980
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    • 2004
  • This study has introduced how to make conducting shape memory polyurethane(CSMPu) as a possible application to smart actuators. Different from conventional polyurethane, CSMPu can have a high conductivity and then electric power supplies enough energy to deform. To prepare conducting polyurethane, carbon nanotubes were incorporated into shape memory polyurethane. Basic experiments to reveal its characteristics have been conducted for a development of actuators. From the results conducted in the present study, optimized conditions for the process of actuating deformation were found. Thermo-electric characteristics such as the relation between temperature and specific resistance and trend curves of resistance variations according to elongations were measured. These data provided a strong possibility of CSMPu as a smart actuator.

Divided Disk Cache and SSD FTL for Improving Performance in Storage

  • Park, Jung Kyu;Lee, Jun-yong;Noh, Sam H.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.15-22
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    • 2017
  • Although there are many efficient techniques to minimize the speed gap between processor and the memory, it remains a bottleneck for various commercial implementations. Since secondary memory technologies are much slower than main memory, it is challenging to match memory speed to the processor. Usually, hard disk drives include semiconductor caches to improve their performance. A hit in the disk cache eliminates the mechanical seek time and rotational latency. To further improve performance a divided disk cache, subdivided between metadata and data, has been proposed previously. We propose a new algorithm to apply the SSD that is flash memory-based solid state drive by applying FTL. First, this paper evaluates the performance of such a disk cache via simulations using DiskSim. Then, we perform an experiment to evaluate the performance of the proposed algorithm.

The Role of NMDA Receptor in Learning and Memory (학습과 기억에서 NMDA 수용체의 역할)

  • Kim, Seung-Hyun;Shin, Kyung-Ho
    • Sleep Medicine and Psychophysiology
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    • v.7 no.1
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    • pp.10-17
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    • 2000
  • To investigate the neurobiological bases of learning and memory is one of the ambitious goals of modern neuroscience. The progress in this field of recent years has not only brought us closer to understanding the molecular mechanism underlying long-lasting changes in synaptic strength, but it has also provided further evidence that these mechanisms are required for memory formation. Since twenty years ago, several studies for the tests of the hypothesis that NMDA-dependent hippocampal long-term potentiation(LTP) underlies learning have been reported. Also, in the recent year, data from mutant mice showed that a potential role for NMDA-dependent LTP in hippocampal CA1 and spatial learning. Although the current evidence for the role of NMDA receptor in learning and memory is not still obvious, NMDA receptor seems to act as a critical switch for activation of a cascade of events that underlie synaptic plasticity.

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Analysis of flash memory characteristics as storage medium of mobile equipments (휴대단말기 저장매체인 플래시 메모리 특성 분석)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • Journal of The Institute of Information and Telecommunication Facilities Engineering
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    • v.10 no.4
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    • pp.115-120
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    • 2011
  • Recently flash memory is widely used in various mobile devices as storage medium. Nonvolatile memory can be divided into two categories: NAND- and NOR-type flash memory. NOR flash memory is mainly used to store instruction codes for operation; while NAND for data storage. However, NAND does show more economical benefits, that is, it is approximately 30~40% cheaper than NOR flash. Therefore it can be useful to improve NAND flash performance by replacing NOR flash with NAND flash combining with various buffer systems.

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A Study on Solving the WSix Peeling Issue at MDDR DRAM (MDDR(Mobile Double Data Rate) DRAM의 WSix Peeling 불량 해결 연구)

  • Chae, Han-Yong;Lee, Sung-Young;Park, Tae-Hoon;Lee, Hyun-Sung;Lee, Kwang-Hee;Seo, Ju-Won;Choi, Kyue-Sang
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.481-482
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    • 2008
  • In this paper, the advanced process has been presented to remove the WSix peeling that was made in sub 100nm DRAM SRCAT(Sphere-shaped-Recess-Ch annel-Array Transistor). The source of WSix peeling was proved to be the groove of gate poly film. We have completely solved the problems to adopt the gate-poly CMP (Chemical Mechanical Polishing) process.

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Overdrive Architecture using DWT and Color Conversion for Frame Memory Reduction (Frame Memory 축소를 위한 DWT와 Color Conversion 기반의 Overdrive 구조)

  • Byeon, Jin-Su;Kim, Hyeon-Seop;Kim, Do-Seok;Kim, Bo-Gwan
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.997-998
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    • 2008
  • In this paper, we proposed a reduced memory overdrive architecture. Proposed overdrive architecture consists of 2D-DWT filter, BLI and Color Conversion block. For Frame Memory reduction we eliminated HH data in DWT-IDWT process and converted color space RGB into YCbCr. Consequently, we reduced Frame Memory about 50%.

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Recovery Techniques for Memory Resident Databases (메인 메모리 상주 데이터 베이스 회복 기법)

  • Kim, Sang-Wook;Lee, Heon-Gyil;Kim, Yong-Seok
    • Journal of Industrial Technology
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    • v.15
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    • pp.51-62
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    • 1995
  • Databases can crash due to various failures in computer systems. Recovery is a mechanism for restoring consistent data from damages caused by the by the failures and is an essential feature in database systems. This paper surveys recovery techniques for memory resident database systems. We first describe the basic architecture for memory resident database systems, and point out the main factors affecting their performance enhancement. Next, we explain the write-ahead logging(WAL), a recovery technique widely-used in most disk resident database systems, for easy understanding of basic recovery mechanisms. And then, we discuss some new concepts employed in memory resident database systems recovery. Finally, we present a representative memory resident database recovery technique, which is based on a special purpose hardware called HALO, as a case study.

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Analysis and Comparison of Error Detection and Correction Codes for the Memory of STSAT-3 OBC and Mass Data Storage Unit (과학기술위성 3호 탑재 컴퓨터와 대용량 메모리에 적용될 오류 복구 코드의 비교 및 분석)

  • Kim, Byung-Jun;Seo, In-Ho;Kwak, Seong-Woo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.2
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    • pp.417-422
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    • 2010
  • When memory devices are exposed to space environments, they suffer various effects such as SEU(Single Event Upset). Memory systems for space applications are generally equipped with error detection and correction(EDAC) logics against SEUs. In this paper, several error detection and correction codes - RS(10,8) code, (7,4) Hamming code and (16,8) code - are analyzed and compared with each other. Each code is implemented using VHDL and its performances(encoding/decoding speed, required memory size) are compared. Also the failure probability equation of each EDAC code is derived, and the probability value is analyzed for various occurrence rates of SEUs which the STSAT-3 possibly suffers. Finally, the EDAC algorithm for STSAT-3 is determined based on the comparison results.

Design & Implementation of Enhanced Groupware Messenger

  • Park, HyungSoo;Kim, HoonKi;Na, WooJong
    • Journal of the Korea Society of Computer and Information
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    • v.23 no.4
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    • pp.81-88
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    • 2018
  • In this paper, we present some problems with the Groupware Messenger functionality based on dot net 2.0 and implement a new design structure to solve them. They include memory leakage, slow processing, and client window memory crash. These problems resulted in the inconvenience of using instant messaging and the inefficient handling of office tasks. Therefore, in this paper, instant messaging functionality is implemented according to a new design architecture. The new system upgrades dot net 4.5 for clients and deploys the new features based on MQTT for the messenger server. We verify that the memory leak problem and client window memory crash issues have been eliminated on the system with the new messenger functionality. We measure the amount of time it takes to bind data to a set of messages and evaluate the performance, compared to a given system. Through this comparative evaluation, we can see that the new system is more reliable and performing.

Fatigue Characterization of NiTiCu Shape Memory Alloys (NiTiCu 형상기억합금의 피로특성)

  • Han, Ji-Won;Park, Sung Bum
    • Journal of the Korean Society of Safety
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    • v.29 no.4
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    • pp.28-33
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    • 2014
  • Recently, the actuator worked by the driving recovery-force of the thermo elastic martensitic transformation of shape memory alloys(SMA) has been studied. This paper presents a study on the fatigue life of shape memory alloy (SMA) actuators undergoing thermally induced martensitic phase transformation under various stress levels. shape memory recoverable stress and strain of Ti-44.5at.%Ni-8at.%Cu alloys were by means of constant temperature tensile tests. Differential scanning calorimetry (DSC) was employed in order to investigate the transformation characteristics of the alloy before the tests. the results were summarized as follows. The martensite inducing stress incerased with the increasing of the Cu-contents. The fatigue life decreased with the increasing of the test load and the Cu-content. The data acquired will be very useful during the design process of an SMA NiTiCu element as a functional part of an actuator.