• Journal of Internet Computing and Services
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• v.14 no.4
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• pp.85-90
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• 2013

Currently, the electric fire prediction system uses PIC(Peripheral Interface Controller) for controller microprocessor. PIC has a slower computing speed than DSP does, so its real-time computing ability is inadequate. So with the basic characteristics waveform during arc generation as the standard reference, the comparison to this reference is used to predict and alarm electric fire from arc. While such alarm can be detected and taken care of from a remote central server, that prediction error rate is high and remote control in mobile environment is not available. In this article, the arc detection of time domain and frequency domain and wavelet-based adaptation algorithm executing the adaptation algorithm in conversion domain were applied to develop an electric fire prediction system loaded with new real-time arc detection algorithm using DSP. Also, remote control was made available through iPhone environment-based app development which enabled remote monitoring for arc's electric signal and power quality, and its utility was verified.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.3
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• pp.558-567
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• 2003

Most digital signal processors provide 4 external interrupt input channels. But these are not sufficient for external interrupts of motor controls. Customized programmable interrupt controller, 8259, has 8 interrupt channels. Therefore, in the case of more external interrupt channels are needed, designers must expand by cascading the 8259. And this, 8259 device, have some inconvenience of interfacing the microprocessor in motor controls. In this paper, the expanded interrupt controller with 14 sufficient interrupt input channels for motor controls is designed using VHDL on the purpose of interfacing the microprocessor to the interrupt controller more compatibly and increasing the device utilization of FPGA/CPLD designed another peripherals. The interrupt controller model and each function blocks is proposed and illustrated. Simulation result are presented to estimate the designed interrupt controller.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.129-132
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• 2002

AE64000 is the 64-bit high-performance microprocessor that ADC Co. Ltd. is developing for an embedded environment. It has a 5-stage pipeline and uses Havard architecture with a separated instruction and data caches. It also provides SIMD-like DSP and FP operation by enabling the 8/16/32/64-bit MAC operation on 64-bit registers. AE64000 processor implements the EISC ISA and uses the instruction folding mechanism (Instruction Folding Unit) that effectively deals with LERI instruction in EISC ISA. But this unit makes branch prediction behavior difficult. In this paper, we designs a branch predictor optimized for AE64000 Pipeline and develops a AES4000 simulator that has cycle-level precision to validate the performance of the designed branch predictor. We makes TAC(Target address cache) and BPT(branch prediction table) seperated for effective branch prediction and uses the BPT(removed indexed) that has no address tags.

• Journal of Advanced Marine Engineering and Technology
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• v.35 no.3
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• pp.309-316
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• 2011

This paper deals with the experimental study of the vibration suppression of the smart structures. First, a new high-speed active control system is presented using the DSP320C6713 microprocessor. A peripheral system developed is composed of a data acquisition system, A/D and D/A converters, piezoelectric (PZT) actuator/sensors, and drivers using PA 95 for fast data processing. Next, the processing time of the peripheral device is tested and the corresponding test results are provided. Since fast data processing is very important in the active vibration control of the structures, achieving the fast loop times of the control system is focused. The control algorithm using PPF in addition to FIR filter is implemented. Finally, numerous experiments were carried out on the aluminum plate to validate the superior performance of the vibration control system at different control loop times.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.2
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• pp.113-119
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• 2011

A frequency in electrical power system changes by the load fluctuation in utility grid, has an influence on a connected generator, and ultimately brings a big trouble in the power system. Therefore, a quick measurement of system frequency and governor control of power system is a very important factor in the reliability and the economic feasibility. Electromagnetic frequency relays in the past had the large power consumption and the difficulty of accurate measurement. After Researched and developed digital relays are very affected by the noise and the distortion, and the recently developed Microprocessor relays have problems of expensive device and time when measuring the frequency at 50[ms]. In this study, An improve algorithm that measures the power system frequency quickly and accurately is suggested, simulated by using Matlab and programmed using C code through DSP6713 KIT. This algorithm is tested to the arbitrary voltage waveform input. The results show that the suggested algorithm is effective in the accurate and quick frequency measurements.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1655-1666
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• 2015

This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

• ETRI Journal
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• v.25 no.5
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• pp.337-344
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• 2003

In this paper, we introduce a fully synthesizable 32-bit embedded microprocessor core called the AE32000B. The AE32000B core is based on the extendable instruction set computer architecture, so it has high code density and a low memory access rate. In order to improve the performance of the core, we developed and adopted various design options, including the load extension register instruction (LERI) folding unit, a high performance multiply and accumulate (MAC) unit, various DSP units, and an efficient coprocessor interface. The instructions per cycle count of the Dhrystone 2.1 benchmark for the designed core is about 0.86. We verified the synthesizability and the area and time performances of our design using two CMOS standard cell libraries: a 0.35-${\mu}m$ library and a 0.18-${\mu}m$ library. With the 0.35-${\mu}m$ library, the core can be synthesized with about 47,000 gates and operate at 70 MHz or higher, while it can be synthesized with about 53,000 gates and operate at 120 MHz or higher with the 0.18-${\mu}m$ library.

• Proceedings of the KIEE Conference
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• 1991.11a
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• pp.219-222
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• 1991

It is difficult to adapt modern control theory to power conversion system for the price of real time control H/W and the difficulty of S/W implementation. But recent development of large integrated circuit make it possible that One-Chip microprocessor processes high speed arithmatic calculation used in control theory. Specially this chip is called Digital Signal Processing chip. So, this research developes high performance, high reliable digital control system using TMS320C30 of Texas Instrument for real time control in power conversion system.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.538-540
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• 2004

Electrical currents generated by human heart activities create magnetic fields represented by MCG(MagnetoCardioGram). Since an MCG signal acquisition system requires precise and stable operation, the system adopts hundreds of SQUID(Superconducting QUantum Interface Device) sensors for signal acquisition. Such a system requires fast real-time data acquisition in a required sampling interval, i.e., 1 mili-second for each sensor. This paper presents designed hardware to acquire data from 256-channel analog signal with 1 ksamples/sec speed, using 12-bit 8-channel ADC devices, SPI interfaces, parallel interfaces, 8-bit microprocessors, and a DSP processor. We implemented SPI interface between ADCs and a microprocessor, parallel interfaces between microprocessors. Our result concludes that the data collection can be done in $168{\mu}sec$ time-interval for 256 SQUID sensors, which can be interpreted to 6 ksamples/sec speed.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.160-163
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• 2005

This paper proposes a simple MPPT control scheme of a Current-Control-Loop Error system Based that can be obtains a lot of advantage to compare with another digital control method, P&O and IncCond algorithm, that is applied mostly a PV system. An existent method is needed an expensive processor such as DSP that calculated to change the measure power of a using current and voltage sensor at the once. Therefore, it is applied a small home power generation system that required many expenses. But, a proposed method is easy to solve the cost reduction and power unbalance problems that it is used by control scheme to limit error of a current control of common sensor. This proposed algorithm had verified through a simulation and an experiment on battery charger using PIC that is the microprocessor of a low price.