• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.411-414
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• 2011

This paper describes a tripple-mode DC-DC buck converter with DPSS Fucntion. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(80mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~80mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 97.02% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is $1465um{\times}895um$ including pads.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.398-401
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• 2011

This paper presents a high-efficiency CMOS PWM DC-DC buck converter. It generates a constant output voltage(1-2.8V), from an input voltage(3.4-3.9V). Inductor-based type is chosen and inductor current is controlled with PWM operation. The designed circuit consists of power switch, Pulse Width Generation, Buffer, Zero Current Sensing, Current Sensing Circuit, Clock & Ramp generation, V-I Converter, Soft Start, Compensator and Modulator. Switching Frequency is 1MHz, It operates in CCM when the load current is more than 40mA, and the maximum efficiency is 98.71% at 100mA. Output voltage ripple is 0.98mV(input voltage:3.5V, output voltage:2.5V). The performance of the designed circuit has been verified through extensive simulation using a CMOS $0.18{\mu}m$ technology.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.181-182
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• 2014

본 논문에서는 풀-브리지 컨버터 회로를 기반으로 하며 양방향 전력변환이 가능한 DC-DC 컨버터를 제안한다. 제안하는 컨버터는 부하의 상태에 상관없이 출력전압을 일정하게 유지하면서 연속적인 양방향 전력변환이 가능하다. 본 논문에서 대상으로 하는 부하는 충/방전기로 컨버터 출력에 여러 대의 충/방 전기가 병렬로 접속되며, 각각의 충/방전기는 개별로 동작한다. 따라서 충/방전기용 양방향 DC-DC 컨버터는 충/방전기의 동작 상태에 관계없이 연속적인 양방향 전력변환이 가능해야 한다. 제안하는 양방향 컨버터의 성능을 확인하기 위하여 시뮬레이션을 수행하였으며, 시뮬레이션 결과 제안한 컨버터가 부하급변 상태에서도 양방향 전력변환을 정상적으로 수행하는 것을 확인하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.179-182
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• 2008

This paper deals with the isolated DC-DC converter with high efficiency using the minimum reactor. In this paper, the proposed convert uses the air core reactor for ZCS(zero currunt switching) which can minimize the core losses and removes the over switching losses by soft switching. The proposed converter is verified by the modes analysis and computer simulation to prove the theoretical background and adequacy.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.4
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• pp.617-624
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• 2023

Recently, miniaturization and low power consumption of electronic products and improved efficiency and power factor improvement have become a matter of great interest. In this paper, an AC-DC converter based on PWM control was designed and made. The AC-DC converter is designed with a structure in which one rectifier circuit and one output voltage control circuit are connected in series. The rectifier circuit is a diode-based single phase full-wave current circuit and the output voltage control circuit is a DC-DC conversion circuit based on PWM control. Arduino was used as the main control device for PWM control, and LCD was configured at the output stage so that the control result could be checked. The error between the output voltage displayed on the oscilloscope and LCD and the target output voltage was confirmed through repeated experiments with the test circuit, and the validity of the proposed design methodology was confirmed by showing an error rate of about 5% based on the oscilloscope measurement value.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.2
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• pp.144-151
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• 2022

In this paper, a 1.5V 256kb eFlash memory IP with low area DC-DC converter is designed for battery application. Therefore, in this paper, 5V NMOS precharging transistor is used instead of cross-coupled 5V NMOS transistor, which is a circuit that precharges the voltage of the pumping node to VIN voltage in the unit charge pump circuit for the design of a low-area DC-DC converter. A 5V cross-coupled PMOS transistor is used as a transistor that transfers the boosted voltage to the VOUT node. In addition, the gate node of the 5V NMOS precharging transistor is made to swing between VIN voltage and VIN+VDD voltage using a boost-clock generator. Furthermore, to swing the clock signal, which is one node of the pumping capacitor, to full VDD during a small ring oscillation period in the multi-stage charge pump circuit, a local inverter is added to each unit charge pump circuit. And when exiting from erase mode and program mode and staying at stand-by state, HV NMOS transistor is used to precharge to VDD voltage instead of using a circuit that precharges the boosted voltage to VDD voltage. Since the proposed circuit is applied to the DC-DC converter circuit, the layout area of the 256kb eFLASH memory IP is reduced by about 6.5% compared to the case of using the conventional DC-DC converter circuit.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.1-7
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• 2008

This paper proposes 3.3V input and 1.8V output voltage mode step-down DC-DC buck converter for wireless mobile system which is designed in a standard 0.35$\mu$m CMOS process. The proposed capacitor multiplier method can minimize error amplifier compensation block size by 30%. It allows the compensation block of DC-DC converter be easily integrated on a chip. Also, we improve efficiency to 3% using low power buffer. Measurement result shows that the circuit has less than 1.17% output ripple voltage and maximum 83.9% power efficiency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.6
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• pp.25-32
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• 2011

This paper proposes high efficiency current-mode DC-DC buck converter that are suitable for portable devices. The current-mode DC-DC buck converter using adjustable Dead-time control method improves the power efficiency 2~5%. The buck converter has been implemented with a standard 0.35${\mu}m$ CMOS process. The size of this chip is 0.97$mm^2$. The input range of the fabricated DC-DC buck converter is 2.5V~3.3V, and the output is 1.8V. The maximum loading current of the converter is 500mA and the peak efficiency is 93% at 200mA loads.

• Journal of IKEEE
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• v.24 no.3
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• pp.859-866
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• 2020

This paper proposes a 2-ch DC-DC converter with a wide-input voltage range from 2.9V~5.6V for wearable AMOLED displays. For positive voltage V_POS, a boost converter is designed using an over-charged voltage permissible circuit (OPC) which generates a normal output voltage even if over-input voltage is applied, and a SPWM-PWM dual mode with 3-segmented power transistors to improve efficiency at light load. For negative voltage V_NEG, a 0.5x regulated inverting charge pump is designed to increase power efficiency. The proposed DC-DC converter was designed using a 0.18-㎛ BCDMOS process. Simulation results show that the proposed DC-DC converter generates V_POS voltages of 4.6 V and V_NEG voltage of -0.6V~-2.3V for input voltage of 2.9V to 5.6V. In addition, it has power efficiency of 49%~92%, output ripple voltage has less than 20 mV for load current range of 1 mA~70 mA.

• Journal of Industrial Technology
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• v.29 no.B
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• pp.145-149
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• 2009

A RF-DC converter is one of the most important components for a wireless power transmission. It has been developed for many applications such as space solar power system, and Radio Frequency Identification(RFID). In this paper, we designed three types of RF-DC converter and compare the performance of each. All types RF-DC convertoer have a maximum conversion efficiency at input power level of 0 dBm~5 dBm and RF-DC converter of third type was the best performance that has a 21.9% of conversion efficiency.