• Title/Summary/Keyword: DC parameter test

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A Study on the Design of Circuits for DC parameter Inspection (DC parameter 검사회로 설계에 관한 연구)

  • 이상신;전병준;김준식
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2003.06a
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    • pp.256-261
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    • 2003
  • A memory industry is developing rapidly according to the period of the ubiquitous to approach. According to the development of a memory industry, the efficiency of the manufacture is becoming the serious consideration. DC parameter test system was a development low in this research for an efficiency increase of the manufacture. DC parameter test system increase of the manufacture. In the method to measure the output after permit volt and current at element.

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A study on the circuit design for DC characteristic inspection of semiconductor devices (반도체 소자의 DC 특성 검사용 회로설계에 관한 연구)

  • 김준식;이상신;전병준
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.1
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    • pp.105-114
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    • 2004
  • In this paper, we design the circuits for DC parameter test of semiconductor devices. The DC parameter tester is the system which inspects the DC parameters of semiconductor devices. In the designed circuits, voltage(current) forcing current(voltage) sensing methods are used to inspect the parameters. The designed circuits are simulated by OR-CAD. The simulation results have good performance.

A Study on the Design of DC Parameter Test System (DC 파라메터 검사 시스템 설계에 관한 연구)

  • 신한중;김준식
    • Journal of the Institute of Convergence Signal Processing
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    • v.4 no.2
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    • pp.61-69
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    • 2003
  • In this paper, we developed the U parameter test system which inspects the property of DC parameter for semiconductor products. The developed system is interfaced by IBM-PC. It is consisted of CPLD part, ADC (Analogue to Digital Converter), DAC (Digital to Analogue Converter), voltage/current source, variable resistor and measurement part. In the proposed system, we have designed the constant voltage source and the constant current source in a part. The CPLD part is designed by VHBL, which it generates the control and converts the serial data to parallel data. The proposed system has two test channels and it operates VFCS mode and CFVS mode. The range of test voltage is from 0[V] to 100[V], and the range of test current is from 0[mA] to 100[mA)]. The diode is tested. The test results have a good performance.

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The Circuit Design for the DC Parameter Inspection of Memory Devices (메모리 소자의 DC parameter 검사회로 설계)

  • 김준식;주효남;전병준;이상신
    • Journal of the Semiconductor & Display Technology
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    • v.3 no.1
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    • pp.1-7
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    • 2004
  • In this paper, we have developed the DC parameters test system which inspects the properties of DC parameters for semiconductor products. The developed system is interfaced by IBM-PC. It is consisted of CPLD part, ADC(Analog-to-Digital Converter), DAC(Digital-to-Analog Converter), voltage/current source, variable resistor and measurement part. In the proposed system, we have designed the constant voltage source and the constant current source in a part. In the comparison of results, the results of the simulation are very similar to the ones of the implementation.

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A Study about Optimization of Laser_repair Condition in EDS Area to Improve the Speed Parameter of High Speed DRAM (High Speed DRAM의 Speed 특성 향상을 위한 EDS Laser_Repair Condition 최적화 방안 연구)

  • Kim, Li-Soon;Han, Young-Shin;Lee, Chil-Gee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.11
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    • pp.1-6
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    • 2002
  • This study is about optimization of Laser Repair Condition in EDS Line to improve AC and DC characteristic of high speed DRAM. The margin of AC parameter can be improved by forcing the proper DC generator levels and also improved by cutting the optional fuse about characteristics.

반도체 소자의 DC 특성 검사를 위한 DC parameter test 회로설계에 관한 연구

  • 이상신;전병준;김준식
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2003.05a
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    • pp.51-54
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    • 2003
  • 반도체 산업의 발전에 따라 생산과정에서의 반도체 소자의 특성을 검사하고, 오류를 검출하는 작업을 효율성 있게 하여 생산성을 향상시키는 것이 더욱 중요시 되고 있다. 이러한 흐름에 맞추어 반도체 test장비에 VFCS(voltage forcing current sensing)와 CFVS(current forcing voltage sensing)를 test 할 수 있게 개발하였다.

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The Parameter Estimation and Stability Improvement of the Brushless DC Motor (Brushless DC Motor의 제어 파라미터 추정과 안정도향상)

  • Kim, Cherl-Jin;Im, Tae-Bin
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.48 no.3
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    • pp.131-138
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    • 1999
  • Generally, the digital controller has many advantages such as high precision, robustness to electrical noise, capability of flexible programming and fast response to the load variation. In this study, we have established proper mathematical equivalent model of Brushless DC (BLDC) motor and estimated the motor parameter by means of the back-emf measurement as being the step input to the controlled target BLDC motor. And the validity of proposed estimation method is confirmed by the test result of step response. As well, we have designed the reasonable digital controller as a consequence of the root locus method which is obtained from the open-loop transfer function of BLDC motor with hall sensor, and the determination of control gain for variable speed control. Here, revised Ziegler-Nichols tuning method is applied for the proper digital gain establishment, and the system stability is verified by the frequency domain analysis with Bode-plot and experimentation.

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A New Approach for Built-in Self-Test of 4.5 to 5.5 GHz Low-Noise Amplifiers

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • ETRI Journal
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    • v.28 no.3
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    • pp.355-363
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    • 2006
  • This paper presents a low-cost RF parameter estimation technique using a new RF built-in self-test (BIST) circuit and efficient DC measurement for 4.5 to 5.5 GHz low noise amplifiers (LNAs). The BIST circuit measures gain, noise figure, input impedance, and input return loss for an LNA. The BIST circuit is designed using $0.18\;{\mu}m$ SiGe technology. The test technique utilizes input impedance matching and output DC voltage measurements. The technique is simple and inexpensive.

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S-parameter Analysis for Read and Write Line of MRAM (MRAM read와 write line의 S-parameter 해석)

  • Park, S.;Jo, S.
    • Journal of the Korean Magnetics Society
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    • v.13 no.5
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    • pp.216-220
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    • 2003
  • In this work, transmission characteristics of read and write signal were calculated when a MRAM (magnetic random access memory) cell is operated up to 10 GHz. Test device having long read and write lines was modeled in 3 dimensions to perform a simulation. The simulation was divided into two parts, read and write operations, and S-parameters were computed utilizing FEM (finite element method) algorithm. Transmission coefficients, S$\sub$21/, for read and write operations of MRAM device which was designed for a single cell test configuration were analyzed from DC to 1 GHz and DC to 10 GHz, respectively. When the insulator thickness between the bit and sense lines was increased from 500 to 1500 ${\AA}$, 3 dB attenuation frequency was increased by 3.3 times, from 135 to 430 MHz. The length of the bit and sense lines were 600 ${\mu}$m. In addition, access time was estimated by calculating the propagation delay utilizing S-parameters.

Electrical Characteristics of ZnO Surge Arrester Elements Subjected to the Mixed DC and 60[Hz] AC Voltages (직류+60[Hz] 교류 중첩전압에 대한 ZnO 피뢰기 소자의 전기적 특성)

  • Lee, Bok-Hee;Yang, Soon-Man
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.26 no.4
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    • pp.41-47
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    • 2012
  • This paper deals with the electrical characteristics related to power loss, equivalent resistance, and leakage currents flowing through new and deteriorated zinc oxide(ZnO) arrester elements subjected to the mixed DC and 60[Hz] AC voltages. The test specimens were deteriorated by 8/20[${\mu}s$] impulse current of 2.5[kA]. The leakage current-applied voltage($I-V$) characteristic curves of ZnO surge arrester elements were measured as a parameter of the ratio of the peak of 60[Hz] AC voltage to the peak of total voltage. As a consequence of test results, in case of the same applied voltage, the leakage currents flowing through the deteriorated ZnO arrester elements were higher than those flowing through the new ZnO surge arrester elements. The cross-over phenomenon in $I-V$ curves of ZnO surge arrester elements measured as a parameter of the mixed ratio of DC and AC voltages was observed at the low current domain. The effect of DC voltage on the leakage current flowing through ZnO surge arrester elements is pronounced at the same magnitude of test voltages. In addition, the larger the applied number of 8/20[${\mu}s$] impulse current of 2.5[kA] is, the greater the power loss is, in particular, the more severe the power loss increases at higher applied voltages.