• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2001년도 하계학술대회 논문집
• /
• pp.840-843
• /
• 2001

In this study, temperature dependency of current gain for AlGaAs/GaAs/GaAs HBT is analytically proposed over the temperature range between 300K and 600K. Energy bandgap, effective mass, intrinsic carrier concentration are considered as temperature dependent parameters. Collector current which is numerically calculated is then analytically expressed to enhance the speed of calculation for current gain. From the results, current gain decreases as the temperature increases. These results will be used to expect the unity current gain frequency f$_{T}$ in conjunction with emitter-base and collector- base capacitances.s.

• 전자공학회논문지A
• /
• 제30A권8호
• /
• pp.57-62
• /
• 1993

In this paper, both feasible power gain and power added efficiency at the operating center frequency of 12 GHz are stressed to design a power FET with double-heterjunction structure. The variable parameters or the design are the unit gate width, the gate length, the doping density of AlGaAs, the AlGaAs thickness, the spacer thickness, the Al mole fraction, and the GaAs well thickness. The results of simulation for the FET with 1.mu.m gate length show that the power gain and the power added efficiency are 10.2 dB and 36.3% at 12GHz, respectively. An extrapolation of the relation between current gain and unilateral gain yields a 17 GHz cutoff frequency and 43GHz maximum frequency of oscillation. The calculation of the current versus voltage characteristics show that the output power of the device is about 0.62W.

• 전기학회논문지P
• /
• 제57권3호
• /
• pp.255-259
• /
• 2008

In this paper, a current-mode integrator for low-voltage, low-power analog integrated circuits is presented. Using the proposed current-mode integrator, the baseband analog filter is designed for WCDMA wireless communication. To verify the proposed current-mode integrator circuit, Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS parameter is performed and achieved 44.9dB gain, 15.7MHz unity gain frequency. The described 3rd-order current-mode baseband analog filter is composed of the proposed current-mode integrator, and SFG(Signal Flow Graph) method is used to realize the baseband filter. The simulated results show 2.12MHz cutoff frequency which is suitable for WCDMA baseband block.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
• /
• pp.289-292
• /
• 2001

A Novel fully-differential bipolar current-controlled current amplifier(CCCA) for electrically tunable circuit design at current-mode signal processing were designed. The CCCA was consisted of fully-differential subtracter and fully-differential current gain amplifier. The simulation result shows that the CCCA has current input impedance of 0.5 Ω and a good linearity. The CCCA has 3-dB cutoff frequency of 20 MHz for the range over bias current 100$mutextrm{A}$ to 20 ㎃. The power dissipation is 3 mW.

• 전기학회논문지P
• /
• 제57권3호
• /
• pp.260-264
• /
• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• 한국산학기술학회논문지
• /
• 제10권12호
• /
• pp.3614-3621
• /
• 2009

본 논문에서는 이득 및 주파수 특성이 개선된 CMOS 저전압 전류모드 적분기가 설계되었다. 설계된 전류모드 적분기는 본 논문에서 새롭게 제안한 선형 캐스코드 회로를 기본으로 구성되었다. 제안된 전류모드 적분기는 기존의 전류미러형 전류모드 적분기의 이득(43.7dB) 및 단위이득주파수(15.2MHz) 비해서 높은 전류이득(47.8dB) 및 단위 이득 주파수(27.8MHz)의 특성을 얻을 수 있었다. 제안된 전류모드 적분기의 응용회로로써 차단주파수 7.03MHz를 갖는 5차 체비세프 저역통과 필터를 설계하였다. 설계된 모든 회로들은 1.8V-$0.18{\mu}m$ CMOS 공정파라메터로써 HSPICE를 이용하여 시뮬레이션되었다.

• Journal of electromagnetic engineering and science
• /
• 제16권3호
• /
• pp.164-168
• /
• 2016

A dual-band through-the-wall imaging radar receiver for a frequency-modulated continuous-wave radar system was designed and fabricated. The operating frequency bands of the receiver are S-band (2-4 GHz) and X-band (8-12 GHz). If the target is behind a wall, wall-reflected waves are rejected by a reconfigurable $G_m-C$ high-pass filter. The filter is designed using a high-order admittance synthesis method, and consists of transconductor circuits and capacitors. The cutoff frequency of the filter can be tuned by changing the reference current. The receiver system is fabricated on a printed circuit board using commercial devices. Measurements show 44.3 dB gain and 3.7 dB noise figure for the S-band input, and 58 dB gain and 3.02 dB noise figure for the X-band input. The cutoff frequency of the filter can be tuned from 0.7 MHz to 2.4 MHz.

• 센서학회지
• /
• 제30권6호
• /
• pp.436-440
• /
• 2021

The impact of the gate length (L_g) on the DC and high-frequency characteristics of indium-rich In_0.8Ga_0.2As channel high-electron mobility transistors (HEMTs) on a 3-inch InP substrate was inverstigated. HEMTs with a source-to-drain spacing (L_SD) of 0.8 ㎛ with different values of L_g ranging from 1 ㎛ to 19 nm were fabricated, and their DC and RF responses were measured and analyzed in detail. In addition, a T-shaped gate with a gate stem height as high as 200 nm was utilized to minimize the parasitic gate capacitance during device fabrication. The threshold voltage (V_T) roll-off behavior against L_g was observed clearly, and the maximum transconductance (g_{m_max}) improved as L_g scaled down to 19 nm. In particular, the device with an L_g of 19 nm with an L_SD of 0.8 mm exhibited an excellent combination of DC and RF characteristics, such as a g_{m_max} of 2.5 mS/㎛, On resistance (R_ON) of 261 Ω·㎛, current-gain cutoff frequency (f_T) of 738 GHz, and maximum oscillation frequency (f_max) of 492 GHz. The results indicate that the reduction of L_g to 19 nm improves the DC and RF characteristics of InGaAs HEMTs, and a possible increase in the parasitic capacitance component, associated with T-shap, remains negligible in the device architecture.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
• /
• pp.77-80
• /
• 2002

In this paper, InP-based HBTs have been optimally designed by numerical simulation and fabricated by the self-aligned process. The structure of HBT was designed in terms of the current gain*f$_{max}$ for the base and f$_{T}$*f$_{max}$ for the collector. The designed structure produced the current gain of about 50 and the cutoff frequency and the maximum oscillation frequency of 87GHz and 2940Hz respectively. In addition, we present a study of the vertical and lateral etching of InP with the mask sides parallel to the principal crystallographic axes, [0101 and (001). This etching characteristics arc used to fabricate self-aligned HBT structures with reduced parasitic effects.s.s.s.

• 한국산학기술학회논문지
• /
• 제13권10호
• /
• pp.4745-4750
• /
• 2012

본 논문에서는 저전압 저전력 필터 설계에 적합한 전류모드 방식을 이용하여 고속 전력선통신(PLC)모뎀 수 신단의 1MHz~30MHz 차단주파수를 갖는 6차 대역통과 필터를 설계하였다. 3차 바터워스 고역통과 필터와 3차 체비세프 저역통과 필터를 종속연결로 구성하여 대역통과 필터를 설계하였다. 필터를 구성하기 위한 핵심로써 기존의 전류미러형 적분기에 비하여 증가된 이득 및 차단주파수를 가지는 새로운 전류모드 적분기를 설계하였다. 설계된 전류모드 적분기의 이득과 차단주파수는 각각 32.2dB 및 247MHz이였다. 설계된 6차 대역통과 필터의 차단주파수는 제어전압에 따라서 200KHz에서 50MHz까지 조정이 될 수 있으며 소비전력은 공급전압 1.8V에서 2.85mW이였다. 설계된 대역통과 필터는 1.8V, $0.18{\mu}m$ CMOS 공정파라메터를 사용하여 검증되었다.