• Journal of Power Electronics
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• 제19권6호
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• pp.1582-1590
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• 2019

A new method for reducing the common-mode current generated by the voltage variations in a two-inverter air conditioner system by applying a synchronized pulse-width modulation (PWM) strategy is proposed. The PWM signals of the master-mode inverter are generated based on the reference voltage, while those of the slave-mode inverter are output in the opposite direction when the master-mode inverter changes its switching state. However, the slave-mode control results in a mismatch between the reference voltage and the actual output voltage that is modified by synchronized control operation. The proposed method is capable of reducing and controlling this voltage error by performing signal selection in the vector space of the slave-mode inverter, which mitigates the distortion of the phase current. The efficacy of this method in reducing conducted emissions has been validated both theoretically and experimentally.

• Journal of Power Electronics
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• 제19권4호
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• 전력전자학회논문지
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• 제27권5호
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• pp.446-454
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• 2022

This study proposes a carrier-based pulse width modulation (PWM) method for leakage current reduction and neutral point (NP) current control in a three-phase three-level converter, which is a carrier-based PWM version of the previously proposed low-frequency common mode voltage PWM. Three groups of space vectors with the same common mode voltage are used. When the averaged NP current needs to be positive or negative, the specific groups are employed to produce low-frequency common mode voltages. The validity of the proposed PWM method is verified through experiments.

• 전력전자학회논문지
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• 제6권5호
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• pp.423-431
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• 2001

최근의 유도전동기 구동 시스템은 고속의 ON, OFF동작 특성을 가진 전력 반도체 소자를 가진 인버터와 이를 제어하기 위한 SVPWM(Space Vector PWM)제어이론에 의하여 주로 구성되어 있다. 이러한 PWM 인버터는 정현파 형태의 전압과 전류를 얻기 위해 높은 스위칭 주파수로 동작을 하게 되고, 매 스위칭이 일어나는 순간마다 di/dt 및 dv/dt가 매우 크기 때문에 무시할 수 없는 양의 고주파 누설전류가 고정자 권선과 프레임 사이에 존재하는 기생 커패시터를 통해 접지로 흐르게 된다. 이로 인해 누전보호 계전기의 오동작 및 모터 권선의 절연파괴에 의한 모터의 수명단축 등과 같은 문제점을 야기하게 된다. 본 논문에서는 이러한 문제점을 일으키는 고주파 누설 전류와 커먼 모드 전압을 감쇄하기 위하여 4 레벨 반파 브릿지 인버터에 의해 커먼 모드 전압과 크기가 같고 극성이 반대인 전압을 생성하고, 이 전압을 커먼 모드 트랜스포머에 인가하여 누설 전류의 원인이 되는 커먼 모드 전압을 상쇄시킬 수 있는 새로운 형태의 능동형 커먼 모드 전압 감쇄기를 제안하였다. 제안된 감쇄기의 동작 성능을 P-SPICE를 이용한 시뮬레이션 및 실험을 통하여 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 연구회 합동 학술발표회 논문집
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• pp.18-22
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• 1998

A PWM inverter with an induction motor often has a problem with a high frequency leakage current that flows through stray capacitor between stator windings and a motor frame to ground. This paper presents an equivalent circuit for high frequency leakage currents in PWM inverter feeding an induction motor, which forms an LCR series resonant circuit. A conventional common mode ckoke or reactor in series between the ac terminals of a PWM inverter and those of an ac motor is not effective to reduce the rms and average values of the leakage current, but effective to reduce the peak value. Furthermore, this paper proposes a leakage current damper which is different in damping principle from the conventional common mode choke. It is shown theoretically and experimentally that the leakage current damper is able to reduce the rms value of the leakage current to 25%, where the core used in the leakage current damper is smaller than that of the conventional common-mode choke

• 전력전자학회논문지
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• 제5권5호
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• pp.443-450
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• 2000

PWM 인버터에 의하여 구동되는 유도전동기는 뛰어난 동작특성을 가지고 있지만, 커먼 모드 전압과 고주파 누설전류를 야기한다. 이 고주파 누설 전류는 여러가지 문제점을 일으킨다. 본 논문에서는 이러한 문제점을 일으키는 고주파 누설 전류와 커먼 모드 진압을 감쇄하기 위하여 커먼 모드 전압과 크기가 같고 반대극성을 가진 전압을 4 level half bridge 인버터를 이용하여 생성하고, 이것을 커먼 모드 transformer에 인가하여 고주파 누설 전류 역시 감쇄시킬 수 있는 새로운 형태의 능동형 커먼 모드 전압 감쇄기를 제안한다. 그리고 제안한 감쇄기의 동작 성능을 시뮬레이션과 실험을 통하여 검증하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.50-52
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• 2003

This paper presents characteristics analysis of brushless DC motor(BLDCM) which driven by two types of PWM mode. The phase current and torque ripples are generated differently at each PWM mode. So they have a different influence on motor characteristics. In this paper, we have analyzed characteristics of BLDCM using time-stepped voltage source finite element method. The effect of two types of PWM mode had been confirmed by comparing each phase current and torque ripple waveform. The compared simulation result is useful to select a better PWM mode.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제48권2호
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• pp.89-96
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• 1999

This paper proposes a common-mode voltage reduction method base on SVPWM(Space-Vector Pulsewidth Modulation) in three phase PWM converter/inverter system. By shifting the active voltage vector of inverter and aligning this to the active vector of converter, it is possible to eliminate a common-mode voltage pulse in one control period. Since the proposed PWM method maintains the active voltage vector, it does not affect the control performance of PWM converter/inverter system. Without any extra hardware, overall common mode voltage dv/dt and conrresponding leakage current can be reduced to two-third of the conventional three phase symmetric SVPWM scheme.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 추계학술대회
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• pp.404-407
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• 2011

본 논문은 전류모드에서 동작하는 PWM/PFM DC-DC Boost 변환기의 설계를 하였다. 부하전류가 클 때는 PWM으로 동작하고, 부하 전류가 작을 때는 PFM으로 동작함으로써 높은 효율을 유지할 수 있게 설계하였다. DC-DC Boost 변환기는 $0.35{\mu}m$ 공정으로 설계되었으며, 500KHz의 주파수에 동작하고, 최대 효율은 92.1%이다. 그리고 부하 전류가 최대 600mA까지 구동 할 수 있다. 전체 칩의 크기는 패드를 포함하여 $1300{\mu}m{\times}1070{\mu}m$이다. 따라서 작은 칩 면적으로 넓은 부하전류를 구동할 수 있는 DC-DC Boost 변환기를 설계하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권2호
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• pp.292-300
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• 2015

This paper proposes a high-efficiency, dual-mode PWM / linear buck converter with a wide-input range. The proposed converter was designed with a mode selector that can change the operation between PWM / linear mode by sensing a load current. The proposed converter operates in a linear mode during a light load and in PWM mode during a heavy load condition in order to ensure high efficiency. In addition, the mode selector uses a bit counter and a transmission gate designed to protect from a malfunction due to noise or a time-delay. Also, in conditions between $-40^{\circ}C$ and $140^{\circ}C$, the converter has variations in temperature of $0.5mV/^{\circ}C$ in the PWM mode and of $0.24mV/^{\circ}C$ in the linear mode. Also, to prevent malfunction and breakdown of the IC due to static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class(Chip level) ESD protection circuit of a P-substrate Triggered SCR type with high robustness characteristics.