• 연구논문집
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• s.24
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• pp.63-79
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• 1994

This article reports a experimental study of the method to achieve a bond joint at lower temperature in a short time. DC magnetron sputtering of Sn, Sn/Pb, Sn/In and Sn/Cu on copper substrate was provided as an interlayer for Cu to Cu bonding under the air environment. Various examination was conducted and investigated on the effect of experimental parameters such as coating materials, coating time(or coating thickness), bonding temperature and bonding time etc. Bonding was performed at the temperature of $210^\circC-320^\circC$ for 0sec and interfacial reaction between the coated layer and copper substrate was examined using optical, scanning electron microscope and x-ray diffractometer. From the obtained results, it was found that intermetallic compounds layer consisted of $\eta-phase(Cu_6Sn_5)$ and $\beta-phase(Cu_3Sn)$ was formed at the joint interface for almost all coating materials. But the dominant phase formed in the preetched Cu substrate coated with Sn was $\beta-phase$. A characteristic morphology looks like a reaction ring, which was believed as the strong interconnecting regions between two substrates, was found to be formed on the reaction surface of copper substrates. The morphologies and compositions of the intermetallics, which depends on the regions of the reaction surface, was appeared as greatly different. Based on above results, the new bonding process to make the joint at lower temperature for short time can be admitted as a feasible process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.6
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• pp.459-466
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• 2000

For the applications in the ultra-large-scale-integration (ULSI) metallization processing copper thin films have been prepared by metal organic chemical vapor deposition (MOCVD) technology on TiN/Si substrates. The films have been deposited with varying the experimental conditions of substrate temperatures and copper source vapor pressures. The films were then annealed in a vacuum condition after the deposition and the annealing effect to the electrical conductivity of the films was measured. The grain size and the crystallinity of the films were observed to be increased by the post annealing and the electrical conductivity was also increased. The best electrical property of the copper film was obtained by in-situ annealing treatment at above 40$0^{\circ}C$ for the sample prepared at 18$0^{\circ}C$ of the substrate temperature.

• Journal of Magnetics
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• v.11 no.3
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• pp.119-122
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• 2006

We electroplated copper-cobalt thin films on a silicon substrate, which had 150 nm thick copper seed layer. The adhesion between the two metallic layers could be increased by utilizing a proper organic additive, pulse plating technique, and high temperature annealing. The thin films exhibited columnar growth of the deposits and enhanced adhesion. This is attributed to the grain growth mechanism introduced by the additive and annealing.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.4 s.33
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• pp.1-5
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• 2004

A multi-layer flexible substrate is composed of copper(Cu)/polyimide that are known as good electrical conductivity, and low dielectric constant, respectively. In this study. conductor line of $5{\mu}m$-pitch was successfully fabricated without non-uniform pattern shape by electroplating copper and coating polyimide on patterned stainless steel. For multi-layer flexible substrate, via holes were drilled by UV laser and filled with electroplating copper and tin. And then, the PI layer with vias and conductor lines was stripped from stainless steel substrate. The PI layers were laminated at once with careful alignment between layers. Solid state reaction between tin and copper during lamination formed the intermetallic compounds of $Cu_6Sn_5$($\eta$-phase) and $Cu_3Sn$($\epsilon$-Phase) and achieved a complete inter-connection by vertically positioning the plugged via holes on via pad. The via formation process has several advantages; such as better electrical property and lower cost than V type via and paste via.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.69-74
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• 2010

A new package substrate for dynamic random access memory(DRAM) devices has been developed using selective aluminum anodization. Unlike the conventional substrate structure commonly made by laminating epoxy-based core and copper clad, this substrate consists of bottom aluminum, middle anodic aluminum oxide and top copper. Anodization process on the aluminum substrate provides thick aluminum oxide used as a dielectric layer in the package substrate. Placing copper traces on the anodic aluminum oxide layer, the resulting two-layer metal structure is completed in the package substrate. Selective anodization process makes it possible to construct a fully filled via structure. Also, putting vias directly in the bonding pads and the ball pads in the substrate design, via in pad structure is applied in this work. These arrangement of via in pad and two-layer metal structure make routing easier and thus provide more design flexibility. In a substrate design, all signal lines are routed based on the transmission line scheme of finite-width coplanar waveguide or microstrip with a characteristic impedance of about $50{\Omega}$ for better signal transmission. The property and performance of anodic alumina based package substrate such as layer structure, design method, fabrication process and measurement characteristics are investigated in detail.

• Korean Journal of Materials Research
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• v.28 no.9
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• pp.516-521
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• 2018

Copper oxide thin films are deposited using an ultrasonic-assisted spray pyrolysis deposition (SPD) system. To investigate the effect of substrate temperature and incorporation of a chelating agent on the growth of copper oxide thin films, the structural and optical properites of the copper oxide thin films are analyzed by X-ray diffraction (XRD), field-emssion scanning electron microscopy (FE-SEM), and UV-Vis spectrophotometry. At a temperature of less than $350^{\circ}C$, three-dimensional structures consisting of cube-shaped $Cu_2O$ are formed, while spherical small particles of the CuO phase are formed at a temperature higher than $400^{\circ}C$ due to a Volmer-Weber growth mode on the silicon substrate. As a chelating agent was added to the source solutions, two-dimensional $Cu_2O$ thin films are preferentially deposited at a temperature less than $300^{\circ}C$, and the CuO thin film is formed even at a temperature less than $350^{\circ}C$. Therefore the structure and crystalline phase of the copper oxide is shown to be controllable.

• Korean Journal of Materials Research
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• v.15 no.7
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• pp.465-472
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• 2005

Preparation of copper film on PET substrate was carried out by cyclic operation of RF-magnetron­sputtering under continuous operation of ECR-CVD. The purpose of this study is aimed to an increase in deposition rate with keeping excellent adhesion between copper film and PET. In order to optimize the sputtering time under continuous ECR-CVD, cyclic operation concept is employed. By changing parameters of cyclic operation such as split of e and cycle time of A, the characteristics and thickness of the deposited copper film are controlled. As $\theta$ value increase, film thickness could confirm to increase and its surface resistivity value decreases. The highest adhesive strength appears at $\theta=0.33$ and cycle time of 30 min. The uniformity of copper film shows $5\%$ in our experimental range.

• Bulletin of the Korean Chemical Society
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• v.30 no.1
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• pp.242-244
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• 2009

• Journal of the Korean Vacuum Society
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• v.6 no.1
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• pp.20-27
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• 1997

We have investigated the formation techniques of copper thin films which would be useful for sub-quarter-micron integrated circuits. A chemical vapor deposition technology has been tried for the better side wall formation of the thin films, and a metal organic compound, named (hface)Cu(VTMS) (hexafluoroacetylacetonate vinyltrimethylsilane copper(I)) was used as the precursors. We have deposited the copper thin films on TiN and $SiO_2$substrates. The film resistivity and deposition selectivity have been measured as functions of substrate temperature and chamber pressure. Best electrical properties were obtained at $180^{\circ}C$ of substrate temperature and 0.6 Torr of chamber pressure. Under the optimum deposition conditions, polycrystalline copper structures were observed to be grown, and the deposition rate of 120 nm/min was measured. The electrical resistivity as low as 0.25$mu \Omega$.cm, and the surface roughness of 15.5 nm were also measured. These are the suitable electrical and material properties required in the sub-quarter-micron device fabrication. Also, in the substrate temperature range of 140-$250^{\circ}C$, high deposition selectivity was observed between TiN and $SiO_2$.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.1
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• pp.63-70
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• 2023

Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heatsensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.