• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.1
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• pp.13-22
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• 2001

This paper presents three dimensional structure of RF packages and the improvement effect of its electrical characteristics when implementing RF transceivers. We divided RF modules into several subunits following each subunit function based on the partitioning algorithm which suggests a method of three dimension stacking interconnection, PAA(pad area array) interconnection and stacking of three dimensional RF package structures. 224MHz ITS(Intelligent Transportation System) RF module subdivided into subunits of functional blocks of a receiver(RX), a transmitter(TX), a phase locked loop(PLL) and power(PWR) unit, simultaneously meeting the requirements of impedance characteristic and system stability. Each sub­functional unit has its own frequency region of 224MHz, 21.4MHz, and 450KHz~DC. The signal gain of receiver and transmitter unit showed 18.9㏈, 23.9㏈. PLL and PWR modules also provided stable phase locking, constant voltages which agree with design specifications and maximize their characteristics. The RF module of three dimension stacking structure showed $48cm^3$, 76.9％ reduction in volume and 4.8cm, 28.4％ in net length, 41.8$^{\circ}C$, 37% in maximum operating temperature, respectively. We have found that three dimensional PAA package structure is able to produce high speed, high density, low power characteristics and to improve its functional characteristics by subdividing RF modules according to the subunit function and the operating frequency, and the features of physical volume, electrical characteristics, and thermal conditions compared to two dimensional RF circuit modules.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.7-13
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• 2011

This paper presents a Time-to-Digital Converter which is a key block of an All-Digital Phase Locked Loop. In this work, a Vernier Delay Line is added in a conventional Gated Ring Oscillator, so it could get multi-phases and a high resolution. The Gated Ring Oscillator uses 7 unit delay cell, the Vernier Delay Line is used each delay cell. So proposed Time-to-Digital Converter uses total 21 phases. This Time-to-Digital Converter circuit is designed and laid out in $0.13{\mu}m$ 1P-6M CMOS technology. The proposed Time-to-Digital Converter achieves 26ps resolution, maximum input signal frequency is 100MHz and the digital output of proposed Time-to-Digital Converter are 8-bits. The proposed TDC detect 5ns phase difference between Start and Stop signal. A power consumption is 8.4~12.7mW depending on Enable signal width.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.9
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• pp.10-17
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• 2007

It opens a new horizon on spintronics for the potential application of MTJ as a universal logic element, to employ the magneto-logic in substitution for the transistor-based logic device. The magneto-logic based on the MTJ element shows many potential advantages, such as high density, and nonvolatility. Moreover, the MTJ element has programmability and can therefore realize the full logic functions just by changing the input signals. This magneto-logic using MTJ elements can embody the reconfigurable circuit to overcome the rigid architecture. The established magneto-logic element has been designed and fabricated on a triple-layer MTJ. We present a novel magneto-logic structure that consists of a single layer MTJ and a current driver, which requires less processing steps with enhanced functional flexibility and uniformity. A 4-bit gray counter is designed to verify the magneto-logic functionality of the proposed single-layer MTJ and the simulation results are presented with the HSPICE macro-model of MTJ that we have developed.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.236-244
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• 2003

In this paper, RF and IF circuits for mobile terminals which have usually been implemented using expensive BiCMOS processes are designed using CMOS circuits, and a Tx CMOS RF/IF single chip for PCS applications is designed. The designed circuit consists of an IF block including an IF PLL frequency synthesizer, an IF mixer, and a VGA and an RF block including a SSB RF mixer and a driver amplifier, and performs all transmit signal processing functions required between digital baseband and the power amplifier. The phase noise level of the designed IF PLL frequency synthesizer is -114dBc/Hz@100kHz and the lock time is less than $300{\mu}s$. It consumes 5.3mA from a 3V power supply. The conversion gain and OIP3 of the IF mixer block are 3.6dB and -11.3dBm. It consumes 5.3mA. The 3dB frequencies of the VGA are greater than 250MHz for all gain settings. The designed VGA consumes 10mA. The designed RF block exhibits a gain of 14.93dB and an OIP3 of 6.97dBm. The image and carrier suppressions are 35dBc and 31dBc, respectively. It consumes 63.4mA. The designed circuits are under fabrication using a $0.35{\mu}m$ CMOS process. The designed entire chip consumes 84mA from a 3V supply, and its area is $1.6㎜{\times}3.5㎜$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.5
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• pp.55-65
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• 2000

In this paper a new architecture of 24-bit two's complement adder is designed by using RB(Redundant Binary) arithmetic which has the advantage of CPF(Carry-Propagation-Free). A MPPL(Modified PPL) XOR/XNOR gate is applied to improve a TC2RB(Two's Complement to RB SUM converter) speed and to reduce the number of transistors, and we proposed two types adder which used a fast RB2TC(RB SUM to Two's Complement converter). The property of two types adder is followings. The improvement of TYPE 1 adder speed is archived through the use of VGS(Variable Group Select) method and TYPE 2 adder is through the use of a 64-bit GCG(Group Change bit Generator) circuit and a 8-bit TYPE 1 adder. For 64-bit, TYPE 1 adder can be expected speed improvement of 23.5%, 25.7% comparing with the CLA and CSA, and TYPE 2 adder can be expected 41.2%, 45.9% respectively. The propagation delay of designed 24-bit TYPE 1 adder is 1.4ns and TYPE 2 adder is 1.2ns. The implementation is highly regular with repeated modules and is very well suited for microprocessor systems and fast DSP units.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.2
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• pp.397-407
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• 2015

In this paper, we designed 1 chip IC for 3-axis gyroscope and 3-axis accelerometer used for various IoT/M2M mobile devices such as smartphone, wearable device and etc. We especially focused on analysis of gyroscope noise and proposed new architecture for removing various noise generated by gyroscope MEMS and IC. Gyroscope, accelerometer and geo-magnetic sensors are usually used to detect user motion or to estimate moving distance, direction and relative position. It is very important element to designing a low noise IC because very small amount of noise may be accumulated and affect the estimated position or direction. We made a mathematical model of a gyroscope sensor, analyzed the frequency characteristics of MEMS and circuit, designed a low noise, compact and low power 1 chip 6-axis inertial sensor IC including 3-axis gyroscope and 3-axis accelerometer. As a result, designed IC has 0.01dps/${\sqrt{Hz}}$ of gyroscope sensor noise density.

• Journal of Biomedical Engineering Research
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• v.18 no.3
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• pp.291-299
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• 1997

As a microimaging device detecting gamma rays emitted from small lesions or tumors during operation, the intraoperative surgical probe has been proposed and is now under development. We have designed a multipurpose portable gamma prove system and evaluated the performance both for the absolute counting purpose of residual radioactivities and for the localizing capability of gamma events using the NaI(Tl) crystal and two types of photomultiplier tubes(PMTs). Counting efficiencies in the range of routine clinical use of radiation dose were measured using the assembly of single channel PMTs and 0.5 inch thick NaI(Tl) crystal of 1 inch diameter. The positioning of gamma events for imaging purpose requires the multiple channel PMTs with appropriate positioning electronics. We have designed a simple and reliable positioning circuit based on the concept of modified Anger. In preliminary experiments using the multiple channel PMT of 3 inch diameter and the dim lighth source, we were able to trace and localize the correct position with reduced positioning error by the use of two multiplier/divider chipset and simplified peripherals. The energy resolutions for the counting gamma probe measured as full width at half maximum(FWHM) for Cs-137, F-18, Tc-99m were 12%, 13%, and 36%, respectively. The spatial resolution for the imaging gamma probe measured as FWHM for green LED was 2.9 mm. The results indicate that the currently developing probe is very promising and could be very useful for many applications in nuclear medicine. Future studies will include developing collimators, improving interface hardwares, and evaluating the system with clinical data.

• Journal of Navigation and Port Research
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• v.41 no.6
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• pp.395-400
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• 2017

As a serial communications protocol, Modbus has become a practically standard communication protocol and is now a commonly available means of connecting industrial electronic devices. Therefore, all devices can be connected using the Modbus protocol with the measurement and remote control on ships, buildings, trains, airplanes and more. The existing Modbus that has been used is based on serial communication. Modbus TCP uses Ethernet communication based on TCP / IP which is the most widely used Internet protocol today; so, it is faster than serial communication and can be connected to the Internet of Things. In this paper, we designed an algorithm to control LED lighting in a wireless Wi-Fi environment using the Modbus TCP communication protocol, and designed and implemented a LED controller circuit that can check external environmental factors and control remotely through the integrated management system of a ship. Temperature, humidity, current and illuminance values, which are external environmental factors, are received by the controller through the sensors, and these values are communicated to the ship's integrated management system via the Modbus protocol. The Modbus can be connected to Master devices via TCP communication to monitor temperature, humidity, current, illuminance status and LED output values, and also users can change the RGB value remotely in order to change to the desired color. In addition, in order to confirm the implementation of the controller, we developed a simulated ship management system to monitor the temperature, humidity, current and illumination conditions, and change the LED color of the controller by changing the RGB value remotely.

• Journal of Sensor Science and Technology
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• v.17 no.5
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• pp.350-360
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• 2008

In every large hospital, nurses must perform simple repetitive tasks such as measuring body temperature. Such tedious work reduces nurses' motivation to provide quality medical care, which is an important element of the medical services provided by a hospital. If a device were available to measure body temperature, nurses could focus on the more important aspects of providing quality medical care to the patients. However, body temperature is generally measured from the throat, anus, tympanum or armpit, where it is difficult to affix a patch type device. In addition, general body temperature measuring points shows moving artifact error; therefore, it is not good point to continually measure the temperature. In this paper, a patch type skin temperature measuring system was developed. To appropriately measure the skin temperature, a thermal transducer was implemented with a thin (0.5 mm) temperature sensor. The system is small and thin ($H6.6{\sim}5.3{\times}L35{\times}W24\;mm$), and weighs only 5 g including a battery, case and circuit; therefore, it is small and light enough to function as a patch type device. Moreover, the system worked for 5 days. To investigate differences between the experimental and conventional thermometer, simple clinical experiments were performed with 17 volunteers, and the result showed some correlation between the implemented system and conventional thermometer (Correlation coefficient = 0.647, P<0.1).

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.48-57
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• 2020

MCU used in applications such as wireless chargers and USB type-C require MTP memory with a small cell size and a small additional process mask. Conventional double poly EEPROM cells are small in size, but additional processing masks of about 3 to 5 sheets are required, and FN tunneling type single poly EEPROM cells have a large cell size. In this paper, a 110nm MTP cell using a vertical PIP capacitor is proposed. The erase operation of the proposed MTP cell uses FN tunneling between FG and EG, and the program operation uses CHEI injection method, which reduces the MTP cell size to 1.09㎛2 by sharing the PW of the MTP cell array. Meanwhile, MTP memory IP required for applications such as USB type-C needs to operate over a wide voltage range of 2.5V to 5.5V. However, the pumping current of the VPP charge pump is the lowest when the VCC voltage is the minimum 2.5V, while the ripple voltage is large when the VCC voltage is 5.5V. Therefore, in this paper, the VPP ripple voltage is reduced to within 0.19V through SPICE simulation because the pumping current is suppressed to 474.6㎂ even when VCC is increased by controlling the number of charge pumps turned on by using the VCC detector circuit.