• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.370-371
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• 2011

This paper presents a control algorithm that minimizes the DC-link capacitance by decreasing the capacitor current. The capacitor current can be nullified by a feedback compensation term which is calculated from the power balance in the AC/DC converter. As a result, voltage variation in the DC-link is reduced further, which makes a large reduction in the size of DC-link capacitors which are expensive and have limitations in life time. Simulations are performed with two 80uF DC-link capacitors, which can be replaced by film capacitors.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1322-1333
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• 2014

To track the sinusoidal current under stationary frame and suppress the effects of low-order grid harmonics, the multi-resonant quasi-proportional plus resonant (PR) controller has been extensively used for digitally controlled LCL-type pulse-width modulation (PWM) converters with capacitor-current-feedback active damping. However, designing the controller is difficult because of its high order and large number of parameters. Moreover, the computation and PWM delays of the digitally controlled system significantly affect damping performance. In this study, the delay effect is analyzed by using the Nyquist diagrams and the system stability constraint condition can be obtained based on the Nyquist stability criterion. Moreover, impact analysis of the control parameters on the current loop performance, that is, steady-state error and stability margin, identifies that different control parameters play different decisive roles in current loop performance. Based on the analysis, a simplified controller design method based on the system specifications is proposed. Following the method, two design examples are given, and the experimental results verify the practicability and feasibility of the proposed design method.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.400-402
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• 1994

This paper presents a digital implementation of delta modulation Technique for Active Power Filters. Delta modulated scheme is to control the harmonic-compensating current indirectly by adjusting the capacitor voltage to be sinusoidal. The overall control system has two feedback loops. One is the outer propotional feedback for loop regulating the dc current of active filters and the other is the inner feedback loop for maintaining the ac current waveform to be sinusoidal, and have zero power factor angle(i.e. unity power factor). The characteristics of the proposed is investigated by digital simulation using ACSL and experimental results are obtained by TMS370C756 Single-Chip Microprocessor relative to analog delta modulation technique.

• Journal of IKEEE
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• v.26 no.2
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• pp.313-318
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• 2022

The feedback voltage detection structure is proposed to alleviate overshoot and undershoot caused by the removal of the existing external output capacitor. Conventional LDO regulators suffer from overshoot and undershoot caused by imbalances in the power supply voltage. Therefore, the proposed LDO is designed to have a more improved transient response to form a new control path while maintaining only the feedback path of the conventional LDO regulator. A new control path detects overshoot and undershoot events in the output stage. Accordingly, the operation speed of the pass element is improved by charging and discharging the current of the gate node of the pass element. LDO regulators with feedback voltage sensing architecture operate over an input voltage range of 3.3V to 4.5V and have a load current of up to 200mA at an output voltage of 3V. According to the simulation result, when the load current is 200mA, it is 73mV under the undershoot condition and 61mV under the overshoot condition.

• Journal of Power Electronics
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• v.19 no.4
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• pp.869-880
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• 2019

Due to the inherent feedforward of load current, capacitor current (CC) control shows a fast transient response that makes it suitable for the power supplies used in various portable electronic devices. However, considering the effect of the outer voltage loop, the stable range of the duty-cycle is significantly diminished in CC controlled buck converters. To investigate the stability effect of the outer voltage loop on buck converters, a CC controlled buck converter with a proportion-integral (PI) compensator is taken as an example, and its second-order discrete-time model is established. Based on this model, the instability caused by the duty-cycle is discussed with consideration of the outer voltage loop. Then the dynamical effects of the feedback gain of the PI compensator and the equivalent series resistance (ESR) of the output capacitor on the CC controlled buck converter with a PI compensator are studied. Furthermore, the design-oriented closed-loop stability criterion is derived. Finally, PSIM simulations and experimental results are supplied to verify the theoretical analyses.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.145-148
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• 2015

In this letter, we present a new linearization method for a voltage controlled oscillator (VCO)-based quantizer in an analog-to-digital converter (ADC). The nonlinearity of the VCO generates unwanted harmonic spurs and reduces the signal-to-noise and distortion ratio (SNDR) of the VCO-based quantizer. This letter suggests a frequency-to-current feedback method to effectively suppress harmonic distortion. The proposed method decreases the harmonic spurs by more than 53 dB. And a VCO-based quantizer employing the proposed linearization method achieves a high SNDR of 74.1 dB.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.4
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• pp.246-255
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• 2000

This paper deals with a novel full digital control method of the three-phase PWM inverter for UPS. The voltage and current of output filter capacitor as state variables are the feedback control input. In addition, a double deadbeat control consisting of a d-q current minor loop and a d-q voltage major loop, both with precise decoupling, have been developed. The switching pulse width modulation based on SVM is adopted so that the capacitor current should be exactly equal to its reference current. In order to compensate the calculation time delay, the predictive control is achieved by the current·voltage observer. The load prediction is used to compensate the load disturbance by disturbance observer with deadbeat response. The experimental results show that the proposed system offers an output voltage with THD less than 2% at a full nonlinear load.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.501-503
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• 1996

In this paper, a novel control strategy for PWM current source converter and inverter is proposed, applying a multivariable state feedback control. The PWM converter controls line current to be sinusoidal and make input power factor unity. In addition, the modulation index control of dc link current is carried out, which produces lower loss of switching devices. Since the voltage control of inverter output filter capacitor is performed a decoupling of the d-q current of the induction motor is well retained. With the proposed algorithm, both high dynamic responses and satisfactory static performance can obtained.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.767-769
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• 1998

Using the R/V converting circuit, hydrogen detecting characteristics of the $WO_3$ films were investigated. The R/V converting circuit is configured with the equivalently constant current driving method connecting an unknown resistor to be measured in the feedback loop of the or-amr rather than using a separated constant current circuit. The response time of the reference voltage for the R/V converting circuit was simulated by the circuit simulator "SABER", and it was found that the response time in the high resistance range become longer and the error amounts to 10%. From the simulation results. replacing the capacitor in the feedback loop of the second stage or-amp with a 0.001uF capacitor, when measuring in the high resistance range, the response characteristics are remarkably improved. The response time was shortened from about 10 seconds to below 1 second. Using this circuit, the effect of $WO_3$ films deposited by sputtering method on hydrogen was measured.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.1
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• pp.15-24
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• 2012

In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.