• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1986.04a
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• pp.194-197
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• 1986

The normal mode parameters of microstrip coupled lines are datermined from the self and mutual capacitance and inductance of microstrip lines. In this paper, these capacitance are computed by using the relaxation method based on Quas1-TEM model for shoelded structure. Using these results, the normal mode parameters of two and three microstrip coupled lines are obtained.

• The Journal of the Acoustical Society of Korea
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• v.13 no.1E
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• pp.5-10
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• 1994

It is obtained the general expessions of the numerical method are applied for the TEM-mode analysis of multu-layer multi-coupled microstrip lines, In this paper, coupled microstrip are replaced by three-coupled microstrip lines in special aplications. Three-layer versions of three-coupled microstrip lines are specially attactive because of the additional flexibilities offered by three-layer configuration. This structure can be used for obtaining large capacitance and preventing coupling among microstrip lines in filter and coupler. Sappihre is chosen for anisotropic substrates material. The permittivity parallel to the optical axis is higher than the permittivity in the plane perpendicular to this axis.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1841-1843
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• 2001

Asymmetrical parallel coupled lines are used in a number of circuits such as multi-band coupler and combline type band pass filter. Although graphical results and formulas are available for the design of coupled lines, the design procedure is hard to use, because even- and odd- mode impedances are always expressed in terms of the physical geometry. In this paper, we introduce a method to find design parameter using finite element analysis. By employing the capacitance obtained by FE analysis, design parameters for each lines are extracted. To show the validity of extracted design parameter for asymmetrical parallel coupled line, we have designed and simulated a planar type combline band pass filter.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.6
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• pp.521-527
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• 2002

In this paper, we introduce a procedure to find design parameter for array coupled lines using 2-D finite element analysis. To extract design parameters using FE calculation, we set up several design conditions. In order to show the validity of our approach, we designed, simulated and fabricated a comb-line bandpass filter.

• Journal of Navigation and Port Research
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• v.31 no.9
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• pp.759-762
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• 2007

A novel miniaturized CMOS C-Band bandpass filter based on diagonally end-shorted coupled lines and interdigital capacitors is proposed. The utilized coupled lines structure reduced the configuration in size, as small as a few degrees. Moreover, the characteristic of interdigital capacitor, relatively high Q and good capacitance tolerance, accounts for the satisfied performance of this new filter. A two-stage bandpass filter was designed and fabricated with chip surface area only $1.02{\times}1.4\;mm^2$.

• Journal of the Korea Institute of Military Science and Technology
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• v.3 no.1
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• pp.155-163
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• 2000

A general characterization procedure based on the extraction of a 2n-port admittance matrix corresponding to n uniform coupled lines on the multi-layered substrate using the Finite-Difference Time-Domain (FDTD) technique is presented. The frequency-dependent normal mode parameters are obtained from the 2n-port admittance matrix, which in turn provides the frequency-dependent distributed inductance and capacitance matrices. To illustrate the technique, several practical coupled line structures on multi-layered substrate, including a three-line structure, have been simulated. It is shown that the FDTD based time domain characterization procedure is an excellent broadband simulation tool for the design of multiconductor coupled lines on multilayered PCBs as well as thick or thin hybrid structures.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.11
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• pp.9-17
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• 2011

As semiconductor process rapidly developed, the density of chips becomes higher and the space between adjacent lines narrows smaller. This trend increases the capacitance and inductance in interconnects and the coupling-capacitance of adjacent lines grows even bigger than the self-capacitance of themselves, especially in global interconnects. Inductive and capacitive coupling observed in these phenomena may cause serious problems in signal integrity. This paper proposes a codeword generation technique using extra interconnect lines to reduce the crosstalk caused by inductive and capacitive coupling and to reduce dynamic power consumption considering probability of input data. To estimate the performance of the proposed technique, the experimental results have been obtained using FastCap, FastHenry and HSPICE, and it has been shown that the power consumption using the proposed technique has yielded approximately 15% less than the results of the previous technique.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.5
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• pp.14-21
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• 1997

The crosstalk among three identical uniform coupled microstrip transmissiom lines is examined. To analyze the crosstalk, the simultaneous equations for the voltage and current waves on each transmission line are induced from the transmission line equation. The capacitance and the inductance of the line to solve the transmission line equation are calculated by the spectral domain analysis and the space domian analysis. There are three quasi-TEM modes is three microstrip transmission lines and the characteristics mode impedences in each mode are almost equal at a weak coupling state. The crosstalk among three identical microstrip transmission lines is calculated varying the frequency from 50MHz to 3GHz.

• Journal of Electrical Engineering and information Science
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• v.2 no.5
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• pp.17-26
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• 1997

Interconnect characterization on a wafer level was performed. Test patterns for single, two-coupled, and triple-coupled lines ere designed by using 0.5$\mu\textrm{m}$ CMOS process. Then interconnect capacitances and resistances were experimentally extracted by using tow port network measurements, Particularly to eliminate parasitic effects, the Y-parameter de-embedding was performed with specially designed de-embedding patterns. Also, for the purpose of comparisons, capacitance matrices were calculated by using the existing CAD model and field-solver-based commercial simulator, METAL and MEDICI. This work experimentally verifies that existing CAD models or parameter extraction may have large deviation from real values. The signal transient simulation with the experimental data and other methodologies such as field-solver-based simulation and existing model was performed. as expected, the significantly affect on the signal delay and crosstalk. The signal delay due to interconnects dominates the sub-micron-based a gate delay (e.g., inverter). Particularly, coupling capacitance deviation is so large (about more than 45% in the worst case) that signal integrity cannot e guaranteed with the existing methodologies. The characterization methodologies of this paper can be very usefully employed for the signal integrity verification or he electrical design rule establishments of IC interconnects in the industry.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.2213-2215
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• 2000

In this paper we implemented a novel re-entrant mode microstrip directional coupler for realizing the high directivity characteristic using finite element (FE) analysis. In microstrip configuration, the high directivity can be reached by matching the even- and odd-mode effective phase velocities. Through the values of capacitance obtained from 2-dimensional finite element(FE) analysis, the phase velocities for each mode and the design parameter were extracted for the proposed coupled-line configuration. Based on the extracted design parameter with phase matching condition we designed and fabricated 30dB directional coupler at 850MHz. Experimental results show good performance with excellent isolation.