• 전자공학회논문지A
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• 제30A권8호
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• pp.42-48
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• 1993

Ar ions were implanted at 1 MeV into (100)Cz Si wafers with dose of 1 * 10$^{15}$ ions/cm$^{2}$. Damage induced by high energy implantation and its annealing behavior during rapid thermal annealing for 10sec at temperatures from 550 to 1100${\circ}C$ were investigated by crosssection transmission electron microscopy study. It can be clearly seen from the observation that the SPE(Solid Phase Epitaxy) regrowth of the buried amorphous layer induced by ion implantation proceeds from both upper and lower amorphous/crystalline (a/c) interfaces, and the activation energy for SPE from interfaces were both 1.43eV. Misfit dislocation where two interfaces met was formed and it coalesced into the hair pin dislocation in the upper regrown region. At the higher temperature after annealing out of the misfit dislocation, hair pin dislocations showed considerable drop in its bandwidth. However, they were not disappeared even at the temperature 1100${\circ}C$ with the end of range dislocation loops which were formed at the original lower a/c interface.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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• pp.29-33
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• 2000

This paper describes on the temperature characteristics of a SDB(silicon-wafer direct bonding) SOI(silicon-on-insulator) Hall sensor. Using the buried oxide $SiO_2$ as a dielectrical isolation layer, a SDB SOI Hall sensor without pn junction isolation has been fabricated on the Si/$SiO_2$/Si structure. The Hall voltage and the sensitivity of the implemented SOI Hall sensor show good linearity with respect to the applied magnetic flux density and supplied current. In the temperature range of 25 to $300^{\circ}C$, the shifts of TCO(temperature coefficient of the offset voltage) and TCS(temperature coefficient of the product sensitivity) are less than ${\pm}6.7{\times}10^{-3}/^{\circ}C$ and ${\pm}8.2{\times}10^{-4}/^{\circ}C$, respectively. These results indicate that the SDB SOI structure has potential for the development of a silicon Hall sensor with a high-sensitivity and high-temperature operation.

• 전자공학회논문지A
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• 제28A권10호
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• pp.821-829
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• 1991

In this paper, a BICMOS technology that has CMOS devices for digital application and bipolar devices for high voltage (80V) analog applications is presented. Basic concept to design BICMOS device is simple process technology without making too many performance trade-offs. The base line process is poly gate p-well CMOS process and three additional masking steps are added to improve bipolar characteristics. The key ingredients of bipolar integration are n+ buried layer process, up/down isolation process and p-well base process. The bipolar base region is formed simultaneously with the region of CMOS p-well area to reduce mask and heat cycle steps. As a result, hFE value of NPN bipolar transistor is 100-150(Ic=1mA). Collector resistance value is 138 ohm in case of bent type collector structure. Breakdown voltage of BVebo, BVcbo and BVceo are 21V, 115V and78V respectively. Threshold voltage is ${\pm}$1.0V for NMOS and PMOS transistor. Breakdown voltage of NMOS and PMOS transistor is obtained 22V and 19V respectively. 41 stage CMOS ring oscillator has 0.8ns delay time.

• 센서학회지
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• 제14권3호
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• pp.206-210
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• 2005

The SOI structure with buried alumina was fabricated by ALD followed by bonding and etchback process. The interface of alumina and silicon was analyzed by CV measurements and cross section was investigated by SEM analysis. The density of interface state of alumina and silicon was 2.5E11/$cm^{2}$-eV after high temperature annealing for wafer bonding. It was confirmed that the surface silicon layer was completely isolated from substrate by cross section SEM and AES depth profile. The device on this alumina SOI structure would have better thermal properties than that on conventional SOI due to higher thermal conductivity of alumina than that of silicon dioxide.

• 대한전자공학회논문지
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• 제21권2호
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• pp.47-53
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• 1984

PN 접합 아이솔레이션의 항복 특성, 특히 소프트 항복 현상에 대해, 아이솔레이tus 마스크를 오정렬시킨 정도와 공정중 생성된 결함들의 영향을 고찰하였다. 그 결과, 아이솔레이션 마스크를 인위적으로 오정렬시킴으로써, 매입층과 아이솔레이션 사이의 간격을 변화시켰을 때, 이것은 항복 전압에만 영향을 줄 뿐 소프트 항복 현상과는 무관하였다. 소프트 항복 현상, 즉 항복 전압 이하에서 역방향 누설 전류가 크게 증가하는 것은 소자 제조 공정중 생성된 산화 적층 결함(OSF)에 의한 것으로 나타났다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.565-568
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• 2000

This paper describes on the temperature characteristics of a SDB(silicon-wafer direct bonding) SOI(silicon-on-insulator) Hall sensor. Using the buried oxide $SiO_2$ as a dielectrical isolation layer, a SDB SOI Hall sensor without pn junction isolation has been fabricated on the Si/$SiO_2$/Si structure. The Hall voltage and the sensitivity of the implemented SOI Hall sensor show good linearity with respect to the applied magnetic flux density and supplied current. In the temperature range of 25 to $300^{\circ}C$, the shifts of TCO(temperature coefficient of the offset voltage) and TCS(temperature coefficient of the product sensitivity) are less than $\pm 6.7$$\times$$10^{-3}$/$^{\circ}C$ and $\pm 8.2$$\times$$10^{-4}$/$^{\circ}C$respectively. These results indicate that the SDB SOI structure has potential for the development of a silicon Hall sensor with a high-sensitivity and hip high-temperature operation.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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• pp.369-372
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• 2004

The characteristics of antimony implants are relatively well-known. Antimony has lower diffusion coefficient, shorter implantation range, and smaller scattering as compared with conventional dopants such as phosphorous and arsenic. It has been commonly used in the doping of buried layer in Bi-CMOS process. In this paper, characteristics and appropriate condition of monitoring in antimony implant beam tuning using $Sb_2O_3$ were investigated to get a reliable process. TW(Thema Wave) and Rs(Sheet Resistance) test were carried out to set up condition of monitoring for stable operation through the periodic inspection of instruction condition. The monitoring was progressed at the point that the slant of Rs varied significantly to investigate the variation of instruction accurately.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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• pp.105-109
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• 1992

ITO film, 1500${\AA}$ of thickness, onto glass and p-InP wafer was prepared by e-beam evaporator. The bet ITO film had the resistivity 5.3${\times}$10$\^$-3/ $\Omega$-cm, the concentration 6.5${\times}$10$\^$20/cm$\^$-3/, the transmittance above 80%, and the optical energy gap about 3.5eV. The higher pressure of injected oxygen, the less reverse bias saturation current and the more open circuit voltage. Under the optimum evaporation conditions, the efficiency was 7.19% and the series resistance, and the shunt resistance were respectively 8.5%, 3${\alpha}$, and 26K$\Omega$. The interdependence between activation energy and pre-exponential factor was found. We found he surface of the p-InP became n-type and consquently supposed that the buried homojunction formation, that is, n+-ITO/n-InP/p-InP was caused by Sn diffusion or loss of phosphorus in the interface layer.

• Transactions on Electrical and Electronic Materials
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• 제12권6호
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• pp.258-261
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• 2011

A ferroelectric $(Bi,La)_4Ti_3O_{12}$ (BLT) thin film fabricated by the pulsed-DC sputtering method was evaluated on a cell structure to check its compatibility to high density ferroelectric random access memory (FeRAM) devices. The BLT composition in the sputtering target was $Bi_{4.8}La_{1.0}Ti_{3.0}O_{12}$. Firstly, a BLT film was deposited on a buried Pt/$IrO_x$/Ir bottom electrode stack with W-plug connected to the transistor in a lower place. Then, the film was finally crystallized at $700^{\circ}C$ for 30 seconds in oxygen ambient. The annealed BLT layer was found to have randomly oriented and small ellipsoidal-shaped grains (long direction: ~100 nm, short direction: ~20 nm). The small and uniform-sized grains with random orientations were considered to be suitable for high density FeRAM devices.

• 한국정밀공학회지
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• 제18권1호
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• pp.89-97
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• 2001

A microgyroscope, which vibrates in two orthogonal axes on the substrate plane, is designed and fabricated. The shuttle mass of the vibrating gyroscope consists of two parts. The one is outer shuttle mass which vibrates in driving mode guided by four folded springs attached to anchors. And the other is inner shuttle mass which vibrates in driving mode as the outer frame does and also can vibrate in sensing mode guided by four folded springs attached to the outer shuttle mass. Due to the directions of vibrating mode, it is possible to fabricate the gyroscope with simplified process by using polysilicon on insulator structure. Fabrication processes of the microgyroscope are composed of anisotropic silicon etching by RIE, gas-phase etching (GPE) of the buried sacrificial oxide layer, metal electrode formation. An eletromechanical model of the vibrating microgyroscope was modeled and bandwidth characteristics of the gyroscope operates at DC 4V and AC 0.1V in a vacuum chamber of 100mtorr. The detection circuit consists of a discrete sense amplifier and a noise canceling circuit. Using the evaluated electromechanical model, an operating condition for high performance of the gyroscope is obtained.