• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.9
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• pp.545-551
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• 2004

CBTC(Communication Based Train Control) System can improve train operation efficiency by realizing moving block system which makes a continuous train interval control in accordance with the position and speed of train. Adopting radio transmission to make a continuous detection of train position and transmit the control data from the ground to a train, CBTC needs dedicated train operation and control algorithm which should be quite different from the conventional track-circuit-based train control system. This paper provides a train operation display and control algorithm for CBTC system in making train interval control, train route control and train supervision. Signalling pattern diagram is devised to analyze the train interval control mechanism of moving block system, and interlocking logic is devised to represent the train route control mechanism of moving block system. For train supervision, train occupation status on railway are displayed by using the segment which virtually divide the whole railway. The proposed method has been successfully applied to the development of CBTC system for the standardized AGT(automatic guided transit) which is under construction now in Korea, and also can be applied to any other CBTC system.

• Journal of KIISE
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• v.43 no.5
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• pp.569-578
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• 2016

The PLC (Programmable Logic Controller) has been widely used for the development of digital control system of nuclear power plant. The PLC has high maintenance costs and increasing complexity, hence, FPGA (Field Programmable Gate Array) based digital control system has been considered as an alternative. However, the development of FPGA based digital control system is a challenge for PLC engineers because they are required to learn about new language to develop FPGA and knowledge and know-how acquired in the development of PLC is not transferable. In this study, we proposed and implemented an automatic translation tool for translation of FBD (Function Block Diagram), a programming language of PLC software, into VHDL (VHSIC Hardware Description Language). Automatically translating the FBD to VHDL using this tool allows PLC engineers to develop FPGA without any knowledge of the hardware description language.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.36 no.12
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• pp.1193-1200
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• 2008

The procedure of design for reliability which consists of reliability analysis and Failure Modes and Effects Analysis(FMEA) is established and reliability assesment is performed for the nano-satellite air-launching rocket, Mirinae II. By means of using the reliability analysis result, the feasibility to insert the Mirinae II to the target orbit for given mission time under operating environment is assessed. During the reliability analysis process, the system is categorized by Work Breakdown Structure(WBS), and reliability structure is defined by both Reliability Block Diagram(RBD) and schematics of the system. FMEA is used to determine the risk priority number of components and parts. The target reliability is satisfied by changing the design of components and parts with high-risk, hence the design for reliability to put the satellite in to the target orbit safely has been performed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.5
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• pp.1040-1048
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• 2016

Recently, the studies of integrated reliability analysis for combat systems are actively progressing. Especially, the research of integrated reliability analysis is emphasized to overcome limitations of the previous studies. In this paper, we propose a calculation technique for integrated hit probability based on front and side hit probabilities that analyzed in previous studies to improve the time-effectiveness. Also, we find out the integrated reliability of each component based on the integrated hit probability which is calculated, and we propose the method which applied the reliability block diagram technique to analyze the whole combat system of the reliability by function kills. For verifying the proposed method, we applied the proposed method to armored fighting vehicle model. The proposed method considers crew which does not considered the element in the previous study and expects to enhance the accuracy of reliability analysis and the time-effectiveness compared with the previous study.

• Journal of the Korean Society for Railway
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• v.10 no.5
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• pp.527-532
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• 2007

In this paper, we suggest those two design plans for power supply method of Hot Standby Sparing System; one is the plan using MTBF based on Constant Failure Rate, and the plan using Reliability Function is the other. Traditionally, RBD (Reliability Block Diagram) is used for reliability prediction which is required to meet any requirements before system operation. However, the system that has redundancy, such as Hot Standby Sparing System, Is not suitable for system reliability modeling using combination model, such as RBD. In this paper, therefore, we demonstrate that for redundancy controller, redundancy modeling design toward fault occurrence design is more effective to build up a system with higher reliability and achieve the effectiveness of loss cost due to maintenance and failure occurred in operation, rather than combinational modeling design.

• Proceedings of the Korea Society for Energy Engineering kosee Conference
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• 1999.05a
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• pp.185-191
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• 1999

An air-conditioning system based on the chemical heat storage principle was considered. $H_2O$ was chosen as the reaction gas and the working fluid as well. Na$_2$S, CaCl$_2$, MnCl$_2$, BaCl$_2$, MgCl$_2$, Fe$_2$(SO$_4$)$_3$ and MnSO$_4$ were tested as the solid reactants by using Cahn pressure balance. Na$_2$S was superior to other salts in respect of high capability of absorption of water gas, 5 moles of $H_2O$ per unit mole of Na$_2$S, and adequate temperature of adsorption, $65^{\circ}C$ at 7torr, and of desorption, 13$0^{\circ}C$ at 76torr. Clausius-Clapeyron diagram of Na$_2$S was obtained via adsorption experiments at several vapor pressures of water gas. To enhance heat and mass transfer characteristics, usually below 1W/m K, of the reactor bed of general adsorption systems, expanded graphite block was adapted as the support of Na$_2$S salt. Expanded graphite blocks had thermal conductivity values of 20~80W/mK with respect to 100~400kg/㎥ of block bulk density. Permeability values of expanded graphite blocks were 10$^{-13}$ ~ 10$^{-14}$ $m^2$ with respect to 100~300kg/㎥ of block bulk density showing highly decreasing values of permeability, below 10$^{-l4}$$m^2$, in the range of above 150kg/㎥ of block bulk density.y.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• v.y2005m4
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• pp.23-26
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• 2005

The method of decreasing the ecological risk for the LRE(Liquid Rocket Engine) test is developed, working on the cryogenic oxidizer and the high-boiling fuel(Kerosene). This Method is based on the study that contains a technical solution method and an accident occurrence range for decreasing of accident probability and damage. This paper contains schematic on the all risk circumstance bring to accident, block-diagram for an accident growth process in case of the propellant leakage, evaluation method of safety distance from test stand to residential area. It will be used to alternative method for the risk reduction of complex technical systems.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.339-342
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• 2005

In order to support ultrawide-band signal generation for low rate WPAN, several types of signal generation mechanisms are suggested such as Chaos, Impluse, and Chirp signals by the activity of IEEE 802.15.4a. The communication system applied chaos theory may have ultrawide-band characteristics with spread spectrum and immunity from multipath effect. In order to use the advantage of chaotic signal generation, we introduce the system implementation of communication and networking systems with the chaos UWB signal. This system may be composed of mainly three parts in hardware architecture : RF transmission with chaotic signal generation, signal receiver using amplifiers and filters, and 8051 & FPGA unit. The most difficult part is to implement the chaotic signal generator and build transceiver with it. The implementation of the system is devidced into two parts i.e. RF blocks and digital blocks with amplifiers, filters, ADC, 8051 processor, and FPGA. In this paper, we introduce the system block diagram for chaotic communications. Mainly the RF block is important for the system to have good performance based on the chaotic signal generator. And the main control board functions for controlling RF blocks, processing Tx and Rx data, and networking in MAC layer.

• Smart Structures and Systems
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• v.6 no.1
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• pp.29-38
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• 2010

An ElectroMagnetic Actuator (EMA) is designed and assessed numerically and experimentally. The EMA has the advantage to be without contact with the structure so it could be applied to light and small mechanism. Nevertheless, the open-loop instability and the nonlinear dynamic behavior with respect to the excitation frequency could limit its application field. The EMA is designed and dimensioned as a function of the experimental structure to be controlled. An inverse model of the EMA is proposed in order to implement a linear action block for the used frequency range. The control strategy is a fuzzy controller with displacements and velocities as inputs. A fuzzy controller of Takagi-Sugeno type is used. The air gap is estimated by using a modal approximation of the displacements issued from all measurements. Several configurations of control are assessed by using numerical simulations. The block diagram used for numerical simulations is implemented under Dspace$^{(R)}$ environment. The implemented controller was tested experimentally in the context of impact perturbations. The results obtained show the effectiveness of the developed procedures and the robustness of the implemented control.

• Progress in Superconductivity
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• v.6 no.1
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• pp.7-12
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• 2004

Due to the very fast switching speed of Josephson junctions, superconductive digital circuit has been a very good candidate fur future electronic devices. High-speed and Low-power microprocessor can be developed with Josephson junctions. As a part of an effort to develop superconductive microprocessor, we have designed an RSFQ 4-bit ALU (Arithmetic Logic Unit) in a pipelined structure. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The RSFQ 1-bit block of ALU used in this work consisted of three DC current driven SFQ switches and a half-adder. We successfully tested the half adder cell at clock frequency up to 20 GHz. The switches were commutating output ports of the half adder to produce AND, OR, XOR, or ADD functions. For a high-speed test, we attached switches at the input ports to control the high-speed input data by low-frequency pattern generators. The output in this measurement was an eye-diagram. Using this setup, 1-bit block of ALU was successfully tested up to 40 GHz. An RSFQ 4-bit ALU was fabricated and tested. The circuit worked at 5 GHz. The circuit size of the 4-bit ALU was 3 mm ${\times}$ 1.5 mm, fitting in a 5 mm ${\times}$ 5 mm chip.