• 한국정보디스플레이학회:학술대회논문집
• /
• 2009.10a
• /
• pp.953-956
• /
• 2009

We have investigated the effect of light on amorphous silicon thin film transistors based photo-sensor applications. We have analyzed the instability caused by electrical gate bias stresses under the light illumination and the effect of photo-induced quasi-annealing on the instability. Threshold voltage ($V_{TH}$) under the negative gate bias stress with light illumination was more decreased than that under the negative gate bias stress without light illumination even though $V_{TH}$ caused by the light-induced stress without negative gate bias was shifted positively. These results are because the increase of carrier density in a channel region caused by the light illumination has the enhanced effect on the instability caused by negative gate bias stress. The prolonged light illumination led to the recovery of shifted VTH caused by negative gate bias stress under the light illumination due to the recombination of trapped hole charges.

• Transactions on Electrical and Electronic Materials
• /
• v.18 no.1
• /
• pp.51-54
• /
• 2017

TFTs (thin film transistors) were fabricated using a-SIZO (amorphous silicon-indium-zinc-oxide) channel by RF (radio frequency) magnetron sputtering at room temperature. We report the influence of various channel thickness on the electrical performances of a-SIZO TFTs and their stability, using TS (temperature stress) and NBTS (negative bias temperature stress). Channel thickness was controlled by changing the deposition time. As the channel thickness increased, the threshold voltage ($V_{TH}$) of a-SIZO changed to the negative direction, from 1.3 to -2.4 V. This is mainly due to the increase of carrier concentration. During TS and NBTS, the threshold voltage shift (${\Delta}V_{TH}$) increased steadily, with increasing channel thickness. These results can be explained by the total trap density ($N_T$) increase due to the increase of bulk trap density ($N_{Bulk}$) in a-SIZO channel layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.3
• /
• pp.181-185
• /
• 2003

Influence of post gate oxidation anneal on Negative Bias Temperature Instability (NBTI) of PMOSFE has been investigated. At oxidation anneal temperature raised above 950$^{\circ}$C, a significant improvement of NBTI was observed which enables to reduce PMO V$\_$th/ shift occurred during a Bias Temperature (BT) stress. The high temperature anneal appears to suppress charge generations inside the gate oxide and near the silicon oxide interface during the BT stress. By measuring band-to-band tunneling currents and subthreshold slopes, reduction of oxide trapped charges and interface states at the high temperature oxidation anneal was confirmed.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2008.10a
• /
• pp.1455-1458
• /
• 2008

Amorphous silicon (a-Si:H) thin-film transistors (TFTs) are fabricated on flexible organic polymer foil substrates. As-fabricated performance, electrical bias-stability at elevated temperatures, electrical response under mechanical flexing, and prolonged mechanical stability of the TFTs are studied. TFTs made on plastic at ultra low process temperatures of $150^{\circ}C$ show initial electrical performance like TFTs made on glass but large gate-bias stress instability. An abnormal saturation of the instability against operation temperature is observed.

• Journal of the Semiconductor & Display Technology
• /
• v.19 no.4
• /
• pp.88-93
• /
• 2020

Based on the capture-emission energy (CEE) maps of CMOS devices, a physics-informed machine learning model for the bias temperature instability (BTI)-induced threshold voltage shifts and low frequency noise is presented. In order to incorporate physics theories into the machine learning model, the integration of artificial neural network (IANN) is employed for the computation of the threshold voltage shifts and low frequency noise. The model combines the computational efficiency of IANN with the optimal estimation of Gaussian mixture model (GMM) with soft clustering. It enables full lifetime prediction of BTI under various stress and recovery conditions and provides accurate prediction of the dynamic behavior of the original measured data.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2006.08a
• /
• pp.711-714
• /
• 2006

Properties of silicon nitride ($SiN_x$) film including physical and electrical characteristics have been studied for improving the stability of hydrogenated amorphous silicon thin-film transistors (a-Si TFTs) in active-matrix liquid-crystal displays (AMLCDs). The instability of a-Si:H TFTs is estimated by accelerated stress test of both bias-temperature stress and bias-illumination stress. The results show that the deposition conditions of $SiN_x$ films with higher power and lower pressure are the best choice for improving the on-current and stability of TFTs.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2009.10a
• /
• pp.1582-1585
• /
• 2009

The effects of bias stress on spin-coated zinc tin oxide (ZTO) transistors are investigated. Applying a positive bias stress results in the displacement of the transfer curves in the positive direction without changing the field effect mobility or the subthreshold behavior. Device instability appears to be a consequence of the charging and discharging of temporal trap states at the interface and in the zinc tin oxide channel region.

• Journal of Sensor Science and Technology
• /
• v.28 no.5
• /
• pp.329-333
• /
• 2019

Solution-processed oxide thin-film transistors (TFTs) have garnered great attention, owing to their many advantages, such as low-cost, large area available for fabrication, mechanical flexibility, and optical transparency. Negative bias stress (NBS)-induced instability of sol-gel IGZO TFTs is one of the biggest concerns arising in practical applications. Thus, understanding the bias stress effect on the electrical properties of sol-gel IGZO TFTs and proposing an effective recovery method for negative bias stressed TFTs is required. In this study, we investigated the variation of transfer characteristics and the corresponding electrical parameters of sol-gel IGZO TFTs caused by NBS and positive bias recovery (PBR). Furthermore, we proposed an effective PBR method for the recovery of negative bias stressed sol-gel IGZO TFTs. The threshold voltage and field-effect mobility were affected by NBS and PBR, while current on/off ratio and sub-threshold swing were not significantly affected. The transfer characteristic of negative bias stressed IGZO TFTs increased in the positive direction after applying PBR with a negative drain voltage, compared to PBR with a positive drain voltage or a drain voltage of 0 V. These results are expected to contribute to the reduction of recovery time of negative bias stressed sol-gel IGZO TFTs.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.5
• /
• pp.519-525
• /
• 2015

Positive bias stress-induced instability in amorphous indium-gallium-zinc-oxide (a-IGZO) bottom-gate thin-film transistors (TFTs) was investigated under high $V_{GS}$/low $V_{DS}$ and low $V_{GS}$/high $V_{DS}$ stress conditions through incorporating a forward/reverse $V_{GS}$ sweep and a low/high $V_{DS}$ read-out conditions. Our results showed that the electron trapping into the gate insulator dominantly occurs when high $V_{GS}$/low $V_{DS}$ stress is applied. On the other hand, when low $V_{GS}$/high $V_{DS}$ stress is applied, it was found that holes are uniformly trapped into the etch stopper and electrons are locally trapped into the gate insulator simultaneously. During a recovery after the high $V_{GS}$/low $V_{DS}$ stress, the trapped electrons were detrapped from the gate insulator. In the case of recovery after the low $V_{GS}$/high $V_{DS}$ stress, it was observed that the electrons in the gate insulator diffuse to a direction toward the source electrode and the holes were detrapped to out of the etch stopper. Also, we found that the potential profile in the a-IGZO bottom-gate TFT becomes complicatedly modulated during the positive $V_{GS}/V_{DS}$ stress and the recovery causing various threshold voltages and subthreshold swings under various read-out conditions, and this modulation needs to be fully considered in the design of oxide TFT-based active matrix organic light emitting diode display backplane.

• Current Applied Physics
• /
• v.18 no.11
• /
• pp.1447-1450
• /
• 2018

The electron spin resonance (ESR) detects point defect of the In-Ga-Zn oxide (IGZO) like singly ionized oxygen vacancies and excess oxygen, and get spin density as a parameter of defect state. So, we demonstrated the spin density measurement of the IGZO film with various deposition conditions and it has linear relationship. Moreover, we matched the spin density with the total BTS and the threshold voltage ($V_{th}$) distribution of the IGZO thin film transistors. The total BTS ${\Delta}V_{th}$ and the $V_{th}$ distribution were degraded due to the spin density increases. The spin density is the useful indicator to predict $V_{th}$ instability of IGZO TFTs.