• Journal of the Korean Geotechnical Society
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• v.28 no.8
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• pp.43-53
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• 2012

In the conventional design of a piled raft, the axial resistance offered by the raft itself is typically neglected and only that of the group pile is accounted in estimating the total axial resistance of the piled raft. As a consequence, piled rafts are usually designed conservatively by neglecting the raft resistance. In this study, a series of centrifuge model tests have been performed to compare the axial behavior of a group pile with that of a piled raft (both having 16 component piles with an array of $4{\times}4$) in sands with different relative densities and in clays with different preconsolidated pressures. The test results revealed that, with respect to the allowable settlement of 25 millimeters for bridge foundations, the piled raft resistances were greater than those of the group pile by 13% for dense sand, by 22% for loose sand, by 30% for stiff clay, and by 22% for soft clay. Furthermore, the ratio of piled raft resistance to group pile resistance increased as the settlement increased.

• Korean Journal of Optics and Photonics
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• v.18 no.6
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• pp.383-388
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• 2007

A color filter was demonstrated incorporating a patterned metal grating in a quartz substrate. The filter is created in a metal layer perforated with a symmetric two-dimensional array of circular holes, with the pitch smaller than the wavelength of the visible light. A finite-difference time-domain simulation was performed to analyze the device by investigating the effect of structural parameters like the grating height, the period, the hole size, and the refractive index of the hole-filling material on its performance. The device performance was especially optimized by controlling the refractive index of the material comprising the holes of the grating. And two different devices were fabricated by means of the e-beam direct writing with the following design parameters: the grating height of 50 nm, the two pitches of 340 nm for the red color and 260 nm for the green color. For the prepared device with the period of 340 nm, the center wavelength was 680 nm and the peak transmission 57%. And for the other device with the pitch of 260 nm, the center wavelength was 550 nm and the peak transmission was 50%. The filling of the hole with a material whose refractive index is matched to that of the substrate has led to an increase of ${\sim}15%$ in the transmission efficiency.

• The KIPS Transactions:PartA
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• v.11A no.2
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• pp.115-122
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• 2004

In this paper, the multiple-valued adders and multipliers are implemented by current-mode CMOS. First, we implement the 3-valued T-gate and the 4-valued T-gate using current-mode CMOS which have an effective availability of integrated circuit design. Second we implement the circuits to be realized 2-variable 3-valued addition table and multiplication table over finite fields $GF(3^2)$, and 2-variable 4-valued addition table and multiplication table over finite fields $GF(4^2)$ with the multiple-valued T-gates. Finally, these operation circuits are simulated under $1.5\mutextrm{m}$ CMOS standard technology, $15\mutextrm{A}$ unit current, and 3.3V VDD voltage Spice. The simulation results have shown the satisfying current characteristics. The 3-valued adder and multiplier, and the 4-valued adder and multiplier implemented by current-mode CMOS is simple and regular for wire routing and possesses the property of modularity with cell array. Also, since it is expansible for the addition and multiplication of two polynomials in the finite field with very large m, it is suitable for VLSI implementation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.2
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• pp.743-750
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• 2017

It is important to ensure a uniform temperature distribution in greenhouses for the mushroom cultivation. The air temperature of the mushroom cultivation greenhouse is made uniform by supplying a constant air temperature with the underground air. The mushroom cultivation array in a greenhouse in seven columns and four rows can make smooth air flows between the rows and prevent air differences between the top and bottom. The buoyancy effect in the entering air of 0.5m/s based on following density difference depending on initial internal temperature needs to be considered. The locations of the Fan Coil Unit (FCU) and fan were defined through flow analysis in a greenhouse to distribute the optimal uniform temperature. In this study, the air conditioning system of a greenhouse with a sandwich heat insulting panel shape which is composed of a FCU and fan was designed by flow analysis. A relatively uniform temperature distribution can be formed because the circulation path of air becomes longer in the different locations of the FCU (inlet) and fan (outlet) through the internal temperature and flow analysis. The cultivation and quality uniformity of the mushrooms could be promoted through these environmental improvements.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.48-57
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• 2020

MCU used in applications such as wireless chargers and USB type-C require MTP memory with a small cell size and a small additional process mask. Conventional double poly EEPROM cells are small in size, but additional processing masks of about 3 to 5 sheets are required, and FN tunneling type single poly EEPROM cells have a large cell size. In this paper, a 110nm MTP cell using a vertical PIP capacitor is proposed. The erase operation of the proposed MTP cell uses FN tunneling between FG and EG, and the program operation uses CHEI injection method, which reduces the MTP cell size to 1.09㎛2 by sharing the PW of the MTP cell array. Meanwhile, MTP memory IP required for applications such as USB type-C needs to operate over a wide voltage range of 2.5V to 5.5V. However, the pumping current of the VPP charge pump is the lowest when the VCC voltage is the minimum 2.5V, while the ripple voltage is large when the VCC voltage is 5.5V. Therefore, in this paper, the VPP ripple voltage is reduced to within 0.19V through SPICE simulation because the pumping current is suppressed to 474.6㎂ even when VCC is increased by controlling the number of charge pumps turned on by using the VCC detector circuit.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.1
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• pp.64-71
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• 2020

eFuse OTP memory IP is required to trim the analog circuit of the gate driving chip of the power semiconductor device. Conventional NMOS diode-type eFuse OTP memory cells have a small cell size, but require one more deep N-well (DNW) mask. In this paper, we propose a small PMOS-diode type eFuse OTP memory cell without the need for additional processing in the CMOS process. The proposed PMOS-diode type eFuse OTP memory cell is composed of a PMOS transistor formed in the N-WELL and an eFuse link, which is a memory element and uses a pn junction diode parasitic in the PMOS transistor. A core driving circuit for driving the array of PMOS diode-type eFuse memory cells is proposed, and the SPICE simulation results show that the proposed core circuit can be used to sense post-program resistance of 61㏀. The layout sizes of PMOS-diode type eFuse OTP memory cell and 512b eFuse OTP memory IP designed using 0.13㎛ BCD process are 3.475㎛ × 4.21㎛ (= 14.62975㎛2) and 119.315㎛ × 341.95㎛ (= 0.0408mm2), respectively. After testing at the wafer level, it was confirmed that it was normally programmed.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.4
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• pp.160-167
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• 2005

Among finite filed arithmetic operations, division/inverse is known as a basic operation for public-key cryptosystems over $GF(2^{m})$ and it is computed by performing the repetitive $AB^{2}$ multiplication. This paper presents a digit-serial-in-serial-out systolic architecture for performing the $AB^2$ operation in GF$(2^{m})$. To obtain L×L digit-serial-in-serial-out architecture, new $AB^{2}$ algorithm is proposed and partitioning, index transformation and merging the cell of the architecture, which is derived from the algorithm, are proposed. Based on the area-time product, when the digit-size of digit-serial architecture, L, is selected to be less than about m, the proposed digit-serial architecture is efficient than bit-parallel architecture, and L is selected to be less than about $(1/5)log_{2}(m+1)$, the proposed is efficient than bit-serial. In addition, the area-time product complexity of pipelined digit-serial $AB^{2}$ systolic architecture is approximately $10.9\%$ lower than that of nonpipelined one, when it is assumed that m=160 and L=8. Additionally, since the proposed architecture can be utilized for the basic architecture of crypto-processor and it is well suited to VLSI implementation because of its simplicity, regularity and pipelinability.

• Journal of Animal Science and Technology
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• v.61 no.4
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• pp.192-203
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• 2019

A study was conducted to determine the influence of feed form and microbial enzyme supplementation on energy utilization, bone quality, and amino acid and mineral digestibility of broiler chickens. Four hundred and eighty Ross 308, day-old broiler chickens were randomly assigned to eight diets formulated from commonly used ingredients in Tanzania. A 2 (pellet or mash) ${\times}$ 4 (control, Axtra XB, Quantum Blue (QB) and Axtra XB + QB enzyme) factorial array in a completely randomized design having six replicates per treatment (10 birds per replicate) was used. Birds were raised in climate-controlled rooms in a 3-phase; starter (0-10 days), grower (11-24 days) and finisher (25-35 days). Apparent metabolizable energy (AME), metabolizable energy intake, net energy of production, energy retained as protein (REp), and efficiency of metabolizable energy use for energy and protein retention were higher (p < 0.05) in birds fed pelleted diets. The AME and REp was higher (p < 0.05) with enzyme supplementation. Ash content, weight, length, width and breaking strength of tibia bones were highest (p < 0.05) in birds on pelleted diets. Tibia bone traits were improved (p < 0.05) when enzymes were included, particularly in a combination of QB and Axtra XB. However, potassium, magnesium, and zinc contents were highest (p < 0.05) when QB was supplemented. Digestibility of all amino acids was higher (p < 0.05) in birds supplied with pellets and with enzyme supplementation for most amino acids, except for serine. There was a positive interaction (p < 0.05) between feed form and enzymes on lysine and phenylalanine digestibility. Digestibility of Ca, P, K, S, Zn, and Fe was higher (p < 0.05) in birds fed pelleted diets, while those on mashed diets had higher (p < 0.05) digestibility of Cu and B. The digestibility of P, K, and Zn was highest (p < 0.001) when QB was added, while Ca, P, S, and B digestibility was highest when a combination of Axtra XB + QB was applied. Pelleted diets with or without enzymes improved energy utilization, digestibility of amino acids, and minerals, and increased bone strength in broiler chickens.

• Journal of the Korean Society of Radiology
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• v.13 no.3
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• pp.319-324
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• 2019

A depth-encoding detector module with silicon photomultipliers(SiPMs) using two layers of scintillation crystal array was designed, and the position measurement capability was verified using DETECT2000. The depth of interaction of the crystal pixels with the gamma rays was tracked through the image acquired with the combination of surface treatment of the crystal pixels and reflectors. The bottom layer was treated as a reflector except for the optically coupled surfaces, and the crystals of top layer were optically coupled each other except for the outer surfaces so that the light sharing was made easier than the bottom layer. Flood images were obtained through the combination of specular reflectors and random reflectors, grounded and polished surfaces of crystal pixels, and the positions at which layer images were generated were measured and analyzed. The images were reconstructed using the Anger algorithm, whose the SiPM signals were reduced as the 16-channels to 4-channels. In the combination of the grounded surface and all reflectors, the depth positions were discriminated into two layers, whereas it was impossible to separate the two layers in the all polished surface combinations. Therefore, using the combination of grounded surface crystal pixels and reflectors could improve the spatial resolution at the outside of the field of view by measuring the depth position in preclinical positron emission tomography.

• Journal of IKEEE
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• v.25 no.4
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• pp.625-633
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• 2021

This paper describes a scalable architecture for flexible hardware implementation of Montgomery modular multiplication. Our scalable modular multiplier architecture, which is based on a one-dimensional array of processing elements (PEs), performs word parallel operation and allows us to adjust computational performance and hardware complexity depending on the number of PEs used, N_PE. Based on the proposed architecture, we designed a scalable Montgomery modular multiplier (sMM) core supporting eight field sizes defined in SEC2. Synthesized with 180-nm CMOS cell library, our sMM core was implemented with 38,317 gate equivalents (GEs) and 139,390 GEs for N_PE=1 and N_PE=8, respectively. When operating with a 100 MHz clock, it was evaluated that 256-bit modular multiplications of 0.57 million times/sec for N_PE=1 and 3.5 million times/sec for N_PE=8 can be computed. Our sMM core has the advantage of enabling an optimized implementation by determining the number of PEs to be used in consideration of computational performance and hardware resources required in application fields, and it can be used as an IP (intellectual property) in scalable hardware design of elliptic curve cryptography (ECC).