• 제목/요약/키워드: Annealing $SiO_2$

검색결과 854건 처리시간 0.036초

Epoxy/Annealing $SiO_2$ Composites의 충진함량에 대한 저 유전특성 (Low Dielectric Properties of Epoxy/Annealing $SiO_2$ Composites for Filler Contents Variation)

  • 박재준;안준오;윤종현
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.224-225
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    • 2007
  • The Low dielectric properties of epoxy/Annealing $SiO_2$ composites using Annealing new material of nanosized amorphous particles were investigated as function frequency, temperature and filler contents composition. The dielectric constant decrease with increasing frequency and also increase with increasing ambient temperature. The dielectric constant decrease with increase annealing filler contents for epoxy base. The result of x-ray diffraction could obtained single crystal of annealing $SiO_2$ from 500nm amorphous $SiO_2$ powder.

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Effect of Annealing Atmosphere on the La2O3 Nanocrystallite Based Charge Trap Memory

  • Tang, Zhenjie;Zhao, Dongqiu;Hu, Huiping;Li, Rong;Yin, Jiang
    • Transactions on Electrical and Electronic Materials
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    • 제15권2호
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    • pp.73-76
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    • 2014
  • $Pt/Al_2O_3/La_2Si_5O_x/SiO_2/Si$ charge trap memory capacitors were prepared, in which the $La_2Si_5O_x$ film was used as the charge trapping layer, and the effects of post annealing atmospheres ($NH_3$ and $N_2$) on their memory characteristics were investigated. $La_2O_3$ nanocrystallites, as the storage nodes, precipitated from the amorphous $La_2Si_5O_x$ film during rapid thermal annealing. The $NH_3$ annealed memory capacitor showed higher charge storage performances than either the capacitor without annealing or the capacitor annealed in $N_2$. The memory characteristics were enhanced because more nitrogen was incorporated at the $La_2Si_5O_x/SiO_2$ interface and interfacial reaction was suppressed after the $NH_3$ annealing treatment.

ECR-플라즈마 화학 증착법에 의해 제조된 $Ta_2O_5$ 박막의 유전 특성 (Dielectric Characteristics of $Ta_2O_5$ Thin Films Prepared by ECR-PECVD)

  • 조복원;안성덕;이원종
    • 한국세라믹학회지
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    • 제31권11호
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    • pp.1330-1336
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    • 1994
  • Ta2O5 films were deposited on the p-Si(100) substrates by ECR-PECVD and annealed in O2 atmosphere. The thicknesses of Ta2O5/SiO2 layers were measured by an ellipsometer and a cross-sectional TEM. Annealing in O2 atmosphere enhanced the stoichiometry of the Ta2O5 film and reduced the impurity carbon content. Ta2O5 films were crystallized at the annealing temperatures above 75$0^{\circ}C$. The best leakage current characteristics and the maximum dielectric constant of Ta2O5/SiO2 film capacitor were observed in the specimen annealed at $700^{\circ}C$ and 75$0^{\circ}C$, respectively. The flat band voltage of the Al/Ta2O5/SiO2/p-Si MOS capacitor was varied in the range of -0.6~-1.6 V with the annealing temperature. The conduction mechanism in the Ta2O5 film, the variation of the effective oxide charge density with the annealing temperature, and the effective electric field distribution in the Ta2O5/SiO2 double layer were also discussed.

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차세대 공정에 적용 가능한 Cu(B)/Ti/SiO2/Si 구조 연구 (A Study on Cu(B)/Ti/SiO2/Si Structure for Application to Advanced Manufacturing Process)

  • 이섭;이재갑
    • 한국재료학회지
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    • 제14권4호
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    • pp.246-250
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    • 2004
  • We have investigated the effects of boron added to Cu film on the Cu-Ti reaction and microstructural evolution of Cu(B) alloy film during annealing of Cu(B)/Ti/$SiO_2$/Si structure. The result were compared with those of Cu(B)/$SiO_2$ structure to identify the effects of Ti glue layers on the Boron behavior and the result grain growth of Cu(B) alloy. The vacuum annealing of Cu(B)/Ti/$SiO_2$ multilayer structure allowed the diffusion of B to the Ti surface and forming $TiB_2$ compounds at the interface. The formed $TiB_2$ can act as a excellent diffusion barrier against Cu-Ti interdiffusion up to $800^{\circ}C$. Also, the resistivity was decreased to $2.3\mu$$\Omega$-cm after annealing at $800^{\circ}C$. In addition, the presence of Ti underlayer promoted the growth Cu(l11)-oriented grains and allowed for normal growth of Cu(B) film. This is in contrast with abnormal growth of randomly oriented Cu grains occurring in Cu(B)/$SiO_2$ upon annealing. The Cu(B)/Ti/$SiO_2$ structure can be implemented as an advanced metallization because it exhibits the low resistivity, high thermal stability and excellent diffusion barrier property.

인이 주입된 poly-Si/SiO$_{2}$/Si 기판에서 텅스텐 실리사이드의 형성에 관한연구 (Stduy on formation of W-silicide in the diped-phosphorus poly-Si/SiO$_{2}$/Si-substrate)

  • 정회환;주병권;오명환;정관수
    • 전자공학회논문지A
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    • 제33A권3호
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    • pp.126-134
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    • 1996
  • Tungsten silicide films were deposited on the phosphorus-doped poly-Si/SiO$_{2}$/Si-substrates by LPCVD (low pressue chemical vapor deposition). The formation and various properties of tungsten silicide processed by furnace annealing in N$_{2}$ ambient were evaluated by using XRD. AFM, 4-point probe and SEM. And the redistribution of phosphorus atoms has been observed by SIMS. The crystal structure of the as-deposited tungsten silicide films were transformed from the hexagonal to the tetragonal structure upon annealing at 550.deg. C. The surface roughness of tungsten polycide films were found to very smoothly upon annelaing at 850.deg. C and low phosphorus concentration in polysilicon layer. The sheet resistance of tungsten polycide low phosphorus concentration in polysilicon layer. The sheet resistance of tungsten polycide films are measured to be 2.4 .ohm./ㅁafter furnace annealing at 1100.deg. C, 30min. It was found that the sheet resistance of tungsten polycide films upon annealing above 1050.deg. C were independant on the phosphorus concentration of polysilicon layer and furnace annealing times. An out-diffusion of phosphorus impurity through tungsten silicide film after annealing in $O_{2}$ ambient revealed a remarkably low content of dopant by oxide capping.

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급속 후 열처리 및 실리콘기판 배향에 따른 MOCVD-TiO2박막의 구조적.전기적 특성 (Effect of Rapid Thermal Annealing and Orientation of Si Substrate on Structural and Electrical Properties of MOCVD-grown TiO2 Thin Films)

  • 왕채현;최두진
    • 한국세라믹학회지
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    • 제35권1호
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    • pp.88-96
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    • 1998
  • The structural and electrical properties of titanium dioxide(TiO2) thin films deposited on p-type (100) si and 4$^{\circ}$off(100) Si substartes by metalorganic chemical vapor deposition (MOCVD) have been studied with post rapid thermal annealing. TiO2 thin films of anatase phase were grown at 300-500$^{\circ}C$ using titanium post rapid thermal annealing at a temperature of 800$^{\circ}C$ for 30sec. rutile phase was observed in the condition of the deposition temperature over 350$^{\circ}C$ in the ambient air atmosphere and at 500$^{\circ}C$ in cacuu,. SEM and AFM study show-ed surface roughness were increased slightly from 40${\AA}$to 55${\AA}$ after annealing due to grain growth and phase transformation. From capacitane-voltage measurement of Al/TiO2./p-Si structure after annealing we obtained ideal capacitance-voltage characteristics of MOS structure with dielectric constant of 16-22 in case of (100) Si and about 30- in case of 4$^{\circ}$off(100) Si but showed the higher leakage current.

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열처리온도에 따른 $SnO_2$/Si 이종접합 태양전지의 전기적 특성 (Electrical characteristics of Sn $O_{2}$Si heterojunction solar cells depending on annealing temperature)

  • 이재형;박용관
    • E2M - 전기 전자와 첨단 소재
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    • 제7권6호
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    • pp.481-489
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    • 1994
  • The $SnO_2$/(n)Si solar cell was fabricated by electron beam evaporation method, and their properties were investigated. In proportion to increase of substrate and annealing temperature, the conductivity of $SnO_2$ thin film was increased, but its optical transmission decreases because of increasing optical absorption of free electrons in the thin film. $SnO_2$/Si Solar cell characteristics were improved by annealing, but the solar cells was deteriorated by heat treatment above 500[.deg. C]. The optimal outputs of $SnO_2$/Si solar cell through above investigations were $V_{\var}$:350[mV], $J_{sc}$ ;16.53[mA/c $m^{2}$], FF;0.41, .eta.=4.74[%]

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비휘발성 메모리를 위한 $SiO_2/Si_3N_4$ 적층 구조를 갖는 터널링 절연막의 열처리 효과 (Annealing Effects of Tunneling Dielectrics Stacked $SiO_2/Si_3N_4$ Layers for Non-volatile Memory)

  • 김민수;정명호;김관수;박군호;정종완;정홍배;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.128-129
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    • 2008
  • The annealing effects of $SiO_2/Si_3N_4$ stacked tunneling dielectrics were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_3N_4/SiO_2/Si_3N_4$(NON), $SiO_2/Si_3N_4/SiO_2$(ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS(Metal-Oxide-Semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field and improved electrical characteristics by annealing processes than $SiO_2$ layer.

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이산화규소 증착된 스테인레스 기판위에 형성된 은 금속 박막의 급속 열처리에 대한 효과 (Rapid Thermal Annealing for Ag Layers on SiO2 Coated Metal Foils)

  • 김경보
    • 융합정보논문지
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    • 제10권8호
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    • pp.137-143
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    • 2020
  • SiO2 증착된 금속 호일 기판에 형성된 은 금속 박막의 급속 열처리에 대한 물리적 및 화학적 특성 영향을 조사하였다. 은 박막을 150도에서 550도까지 온도를 변화시키며, 각 온도에서 20분 동안 급속 열처리를 진행하였다. 550도에서 표면 거칠기와 저항이 급격하게 증가하는 현상을 발견하였다. 따라서 550도의 열처리 온도 샘플에 대해 조성 분석 기법을 사용하였고, 은 필름 표면에 산소 (O) 및 실리콘 (Si) 원자가 존재함을 확인하였다. 박막의 광학적 특성인, 전체 반사율은 온도가 증가함에 따라 감소하였으며, 특히 550도에서 공정을 진행한 박막은 박막 및 기판 표면으로부터의 다중 반사에 의한 광학적 간섭으로 인해 정현파 특성을 나타냄을 확인하였다. 이러한 현상은 급속 열처리 동안 SiO2 층으로부터 Si 원자의 외부 확산에 기인한 것이다. 본 연구 결과는 다양한 플렉서블 광전자소자의 기판으로 사용할 수 있는 가능성을 제공한다.

등온 열처리시 알루미늄 다층 박막의 열적 안정성에 관한 연구 (A Study on the Thermal Stability in Multi-Aluminum Thin Films during Isothermal Annealing)

  • 전진호;박정일;박광자;김홍대;김진영
    • 한국표면공학회지
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    • 제24권4호
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    • pp.196-205
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    • 1991
  • Multi-level thin films are very important in ULSI applications because of their high electromigration resistance. This study presents the effects of titanium, titanium nitride and titanium tungsten underlayers of the stability of multi-aluminum thin films during isothermal annealing. High purity Al(99.999%) films have been electron-beam evaporated on Ti, TiN, TiW films formed on SiO2/Si (P-type(100))-wafer substrates by RF-sputtering in Ar gas ambient. The hillock growth was increased with annealing temperatures. Growth of hillocks was observed during isothermal annealing of the thin films by scanning electron microscopy. The hillock growth was believed to appear due to the recrystallization process driven by stress relaxation during isothermal annealing. Thermomigration damage was also presented in thin films by grain boundary grooving processes. It is shown that underlayers of Al/TiN/SiO2, Al/TiW/SiO2 thin films are preferrable to Al/SiO2 thin film metallization.

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