• Applied Chemistry for Engineering
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• v.20 no.1
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• pp.99-103
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• 2009

HBr and $O_2$ in $Cl_2$ gas ambient for the high density plasma gate etching has been used to increase the performance of gate electrode in semiconductor devices. When an un-doped amorphous silicon layer was used for a gate electrode material, the notching profile was observed at the outer sidewall foot of the outermost line. This phenomenon can be explained by the electron shading effect: i.e., electrons are captured at the photoresist sidewall while ions pass through the photoresist sidewall and reach the oxide surface at a narrowly spaced pattern during the over etch step. The potential distribution between gate lines deflects the ions trajectory toward the gate sidewall. In this study, an appropriate mechanism was proposed to explain the occurrence of notching in the gate electrode of un-doped amorphous silicon.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.5
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• pp.237-241
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• 2004

Amorphous silicon (a-Si) films are used in a broad range of solar cell, flat panel display, and sensor. Because of the greater ease of deposition and lower processing temperature, thin films are widely used for thin film transistors (TFTs). However, they have lower stability under the exposure of visible light and because of their low field effect mobility ($\mu$$_{FE}$ ) , less than 1 c $m^2$/Vs, they require a driving IC in the external circuits. On the other hand, polycrystalline silicon (poly-Si) thin films have superiority in $\mu$$_{FE}$ and optical stability in comparison to a-Si film. Many researches have been done to obtain high performance poly-Si because conventional methods such as excimer laser annealing, solid phase crystallization and metal induced crystallization have several difficulties to crystallize. In this paper, a new crystallization process using a molybdenum substrate has been proposed. As we use a flexible substrate, high temperature treatment and roll-to-roll process are possible. We have used a high temperature process above 75$0^{\circ}C$ to obtain poly-Si films on molybdenum substrates by a rapid thermal annealing (RTA) of the amorphous silicon (a-Si) layers. The properties of high temperature crystallized poly-Si studied, and poly-Si has been used for the fabrication of TFT. By this method, we are able to achieve high crystal volume fraction as well as high field effect mobility.

• The Korean Journal of Ceramics
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• v.3 no.2
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• pp.96-100
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• 1997

Hydrogenated amorphous carbon films were deposited on silicon substrates by using an RF PECVD. The hydrogen/methane ratio was varied from 50% to 88% to study the effect of hytdrogen in the film on the tribological properties. The friction and wear behaviors of the deposited films were investigated by ball-on-disk type wear tester. FT-IR spectra were used to characterize the structure of the films. Tribological properties of carbon films were correlated with their structure such as ratio of "polymer-like" stretching type and that of sp2 bonding. The result showed that the annealing caused a decrease in the amount of wear of contacted $Si_3N_4$ balls and a increase in the coefficient of friction. Possible explanation for annealing effect was discussed by the hydrogen desorption.esorption.

• Transactions on Electrical and Electronic Materials
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• v.18 no.1
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• pp.51-54
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• 2017

TFTs (thin film transistors) were fabricated using a-SIZO (amorphous silicon-indium-zinc-oxide) channel by RF (radio frequency) magnetron sputtering at room temperature. We report the influence of various channel thickness on the electrical performances of a-SIZO TFTs and their stability, using TS (temperature stress) and NBTS (negative bias temperature stress). Channel thickness was controlled by changing the deposition time. As the channel thickness increased, the threshold voltage ($V_{TH}$) of a-SIZO changed to the negative direction, from 1.3 to -2.4 V. This is mainly due to the increase of carrier concentration. During TS and NBTS, the threshold voltage shift (${\Delta}V_{TH}$) increased steadily, with increasing channel thickness. These results can be explained by the total trap density ($N_T$) increase due to the increase of bulk trap density ($N_{Bulk}$) in a-SIZO channel layer.

• International Journal of Precision Engineering and Manufacturing
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• v.9 no.4
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• pp.86-100
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• 2008

This article reviews the development of flat-panel detectors for digital radiography based on amorphous materials, Important design parameters and developments are described for the two main components of flat-panel detectors: the X-ray converter and the readout pixel array. This article also introduces the advanced development concepts of new detectors. In addition, the cascaded linear systems method is reviewed because it is a very powerful tool for improving the design and assessment of X-ray imaging detector systems.

• Journal of the Korean Ceramic Society
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• v.31 no.1
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• pp.74-78
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• 1994

Degradation of thin oxide by doped poly-Si and its improvement were studied. The gate oxide can be degraded by phosphorous in poly-Si doped POCl3. The degradation is increased with the decrement of sheet resistance and poly-Si thickness. Oxide failures of amorphous-Si are higher than those of poly-Si. In-situ double deposition of amorphous-Si, 54$0^{\circ}C$/30 nm, and poly-Si, 6$25^{\circ}C$/220 nm, forms the mismatch structure of grain boundary between amorphous-Si and poly-Si, and suppresses the excess phosphorous on oxide surface by the mismatch structure. The control of phosphorous through grain boundary improves the oxide reliability.

• Journal of Information Display
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• v.2 no.2
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• pp.7-12
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• 2001

A viscous Ni solution was coated over amorphous Si thin film for evenly spread of Ni metal source. The Ni s. prepared by dissolving $NiCl_2$ into IN HCI and mixing with propylene glycol. $NiCl_2$ and Ni were deposited on the amorphous film after oven dry and they enabled to obtain a uniform crystallization. The crystallization using the viscous Ni solution was a Ni-silicide mediated process, the same process used with Ni metal layer. The crystallization temperature was lowered to $480^{\circ}C$ by the synergy effect of silicide-mediated crystallization and microwave-induced crystallization. Lateral crystallization was also enhanced such that the velocity of lateral crystallization by microwave annealing became faster than by furnace annealing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.83-87
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• 2003

Thin films of amorphous carbon (a-C) generally combine high wear resistance with low friction coefficients and a-C films have widespread applications as protective coatings and passivation of electrical circuit and insulating layer. In this work we deposited the amorphous carbon (a-C) films on silicon substrate with a high rate DC magnetron sputtering system. It is obtained parameters on the deposition rate and physical properties of a-C films using a wide range of Ar gas pressure and DC power. The physical properties of the films were analyzed by Nanoindenter and AFM (Atomic Force Microscopy), The electrical properties were investigated by electrical conductivity measurement.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.4
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• pp.272-275
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• 2019

We investigated the electrical characteristics of amorphous silicon-zinc-tin-oxide (a-SZTO) thin films deposited by RF-magnetron sputtering at room temperature depending on the deposition time. We fabricated a thin film transistor (TFT) with a bottom gate structure and various channel thicknesses. With increasing channel thickness, the threshold voltage shifted negatively from -0.44 V to -2.18 V, the on current ($I_{on}$) and field effect mobility (${\mu}_{FE}$) increased because of increasing carrier concentration. The a-SZTO film was fabricated and analyzed in terms of the contact resistance and channel resistance. In this study, the transmission line method (TLM) was adopted and investigated. With increasing channel thickness, the contact resistance and sheet resistance both decreased.

• Korean Journal of Materials Research
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• v.22 no.1
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• pp.8-15
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• 2012

Silicon-based thin film was prepared at room temperature by an electrochemical deposition method and a feasibility study was conducted for its use as an anode material in a rechargeable lithium battery. The growth of the electrodeposits was mainly concentrated on the surface defects of the Cu substrate while that growth was trivial on the defect-free surface region. Intentional formation of random defects on the substrate by chemical etching led to uniform formation of deposits throughout the surface. The morphology of the electrodeposits reflected first the roughened surface of the substrate, but it became flattened as the deposition time increased, due primarily to the concentration of reduction current on the convex region of the deposits. The electrodeposits proved to be amorphous and to contain chlorine and carbon, together with silicon, indicating that the electrolyte is captured in the deposits during the fabrication process. The silicon in the deposits readily reacted with lithium, but thick deposits resulted in significant reaction overvoltage. The charge efficiency of oxidation (lithiation) to reduction (delithiation) was higher in the relatively thick deposit. This abnormal behavior needs to clarified in view of the thickness dependence of the internal residual stress and the relaxation tendency of the reaction-induced stress due to the porous structure of the deposits and the deposit components other than silicon.