• Title/Summary/Keyword: Address time

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Modified March Algorithm Considering NPSFs (NPSFs를 고려한 수정된 March 알고리즘)

  • Kim, Tae-Hyeong;Yun, Su-Mun;Park, Seong-Ju
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.4
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    • pp.71-79
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    • 2000
  • The original March algorithms cannot detect CMOS ADOFs(Address Decoder Open Faults) which requires separate deterministic test patterns. Modified March algorithm using DOF(Degree of Freedom) was suggested to detect these faults in addition to conventional stuck faults. This paper augments the modified march test to further capture NPSFs(Neighborhood Pattern Sensitive Faults). Complete CA(Cellular Automata) is used for address generation and Rl-LFSRs(Randomly Inversed LFSRs) for data generation. A new modified March algorithm can detect SAF, CF, TF, CMOS ADOFs, and part of NPSFs. Time complexity of this algorithm is still O(n).

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Selective Reset Waveform using Wide Square Erase Pulse in an ac PDP (AC PDP에서의 대폭소거방식을 이용한 선택적 초기화 파형)

  • Jeong, Dong-Cheol;Whang, Ki-Woong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.12
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    • pp.2189-2195
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    • 2007
  • In this paper, we propose a newly developed selective reset waveform of a ac PDP using the wide erase pulse technique with the control of address bias voltage. Although it is generally understood that the wide pulse erasing methode shows the narrow driving margin in an opposite discharge type ac PDP, we could obtain a moderate driving margin in a 3-electrode surface discharge type ac PDP. The obtained driving margin shows a strong dependency on the sustain voltage and the address bias voltage. The lower the sustain and the address bias voltage, the wider the driving margin. The pulse width of the proposed waveform is only $10{\mu}s$, which gives additional time to the sustain period, hence increases the brightness. The brightness and contrast ratio increase about 20% together comparing to the conventional ramp type selective reset waveform with the driving scheme of 10 subfield ADS method. The driving margin was measured with the line by line addressed pattern on the white test panel of 2inch diagonal size and the discharge gas was Ne+Xe4%, 400torr.

A study of the estimation for sound property in the classroom (강의실에서의 음향특성 평가에 관한 연구)

  • Lee, Chai-Bong
    • Journal of the Institute of Convergence Signal Processing
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    • v.8 no.1
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    • pp.32-38
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    • 2007
  • In order to establish the environmental condition of sounds in the classroom, we measured the impulse response in cases of using and not-using PA(Public-Address). By calculating the physical index of acoustics, I examined the differences between the two cases. The degree of improvement in listening with the help of PA has also been studied by testing the voice articulation with the use of the measured impulse response. As a result, I found that the clearness is enhanced by increasing the sound pressure level in the case of short reverberation. However, it was not the case when the reverberation time was long.

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A study on the compensation of misfiring by the method of ramp address voltage in AC PDP (AC PDP의 경사형 Address 전압 인가 방식에 의한 오방전 보상에 관한 연구)

  • Kim, J.Y.;Lee, S.J.;Kwon, B.D.;Kim, D.H.;Lee, H.J.;Park, J.H.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.05a
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    • pp.149-152
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    • 2002
  • If the ambient temperature rises for AC PDP, some of the discharge cells are turned off because of the misfiring during address period. Particularly, the misfiring of the 'last scan line is more serious than that of the first. In order to compensate the misfiring in such that case, different addressing voltage is applied at each cell such as progressively increasing pulse voltage instead of constant one. As a result, the addressing time and discharge charge of the last scan line have become similar to those of the first scan line and the phenomenon of misfiring has disappeared.

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IMT: A Memory-Efficient and Fast Updatable IP Lookup Architecture Using an Indexed Multibit Trie

  • Kim, Junghwan;Ko, Myeong-Cheol;Shin, Moon Sun;Kim, Jinsoo
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.4
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    • pp.1922-1940
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    • 2019
  • IP address lookup is a function to determine nexthop for a given destination IP address. It takes an important role in modern routers because of its computation time and increasing Internet traffic. TCAM-based IP lookup approaches can exploit the capability of parallel searching but have a limitation of its size due to latency, power consumption, updatability, and cost. On the other hand, multibit trie-based approaches use SRAM which has relatively low power consumption and cost. They reduce the number of memory accesses required for each lookup, but it still needs several accesses. Moreover, the memory efficiency and updatability are proportional to the number of memory accesses. In this paper, we propose a novel architecture using an Indexed Multibit Trie (IMT) which is based on combined TCAM and SRAM. In the proposed architecture, each lookup takes at most two memory accesses. We present how the IMT is constructed so as to be memory-efficient and fast updatable. Experiment results with real-world forwarding tables show that our scheme achieves good memory efficiency as well as fast updatability.

Gated Recurrent Unit based Prefetching for Graph Processing (그래프 프로세싱을 위한 GRU 기반 프리페칭)

  • Shivani Jadhav;Farman Ullah;Jeong Eun Nah;Su-Kyung Yoon
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.2
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    • pp.6-10
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    • 2023
  • High-potential data can be predicted and stored in the cache to prevent cache misses, thus reducing the processor's request and wait times. As a result, the processor can work non-stop, hiding memory latency. By utilizing the temporal/spatial locality of memory access, the prefetcher introduced to improve the performance of these computers predicts the following memory address will be accessed. We propose a prefetcher that applies the GRU model, which is advantageous for handling time series data. Display the currently accessed address in binary and use it as training data to train the Gated Recurrent Unit model based on the difference (delta) between consecutive memory accesses. Finally, using a GRU model with learned memory access patterns, the proposed data prefetcher predicts the memory address to be accessed next. We have compared the model with the multi-layer perceptron, but our prefetcher showed better results than the Multi-Layer Perceptron.

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Chaos Based Random Number Generation In Tiny MCU (소형마이콤에서의 카오스난수 발생 함수구현)

  • Hyun, Jae-Ho
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.47 no.3
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    • pp.1-4
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    • 2010
  • RS-485, communication bases from small network system must prepare in collision. The collision is that mean the data transfer breaks. For a stabilized communication chooses 1:N polling methods. But polling is low speed in addition to maybe overload Master device. So, usual N:N Prefers a communication. In this case, must be preparing to avoid collision or some solutions. Generally, to after collision retransmits after short time. It's called delay time for short time. When making a delay time, uses address of each systems. (Address of each node) If the many nodes collided, the each node has different delay time. When making a delay time, uses a usual random number. Making a random number is hard job. So uses a usual pseudorandom number. It is more difficult from small size MCU. The Chaos random number provides stabled value. Finally, when uses the Chaos random number, the stability and reliability of system get better.

Client-Based Video-On-Demand System Implementation using Multicast (멀티캐스트를 이용한 사용자 기반의 비디오 주문형 시스템 구현)

  • Hwang, Tae-June;Kim, Back-Hyun;Ik, Soo-Kim
    • Journal of Internet Computing and Services
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    • v.6 no.6
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    • pp.127-137
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    • 2005
  • This paper presents implementation of client-based VOD service using multicast delivery, Conventional system provide server-based system in multicast delivery but implemented system provides on-demand client-based multicast system. The Multicast Agent Scheduler aggregates clients' request and it generate multicast group addresses and port numbers according to requested video items and service request time. Then it transmits immediately multicast address to VOD server and client who request service. And then VOD server transmits requested streams with a multicast group address and the client joins the group automatically. The Multicast Agent Scheduler assigns the same multicast group address when other clients request an identical video within the same scheduling duration. The proposed system can reduce load of server and support many clients at the same time and applies it to WMT(window media technology) of Microsoft.

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Discharging Characteristics of Green cell Using MgO-Coated $Zn_2SiO_4:Mn^{2+}$ Phosphor in Plasma Display Panel

  • Han, Bo-Yong;Jeoung, Byung-Woo;Hong, Gun-Young;Yoo, Jae-Soo;Ha, Chang-Hun;Whang, Ki-Woong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.575-578
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    • 2004
  • The charging tendency of $Zn_2SiO_4:Mn^{2+}$ phosphor surface was modified in order to improve discharging characteristic of green cell in an ac-plasma display panel (ac-PDP). The Zinc-silicate ($Zn_2SiO_4:Mn^{2+}$) green-emitting phosphor was coated with magnesium oxide(MgO), which is viable to have positive charge on the surface. After fabricating the green cell with MgO-coated $Zn_2SiO_4:Mn^{2+}$, the electrical and optical properties in the cell were examined. It was found that the dynamic voltage margin could be increased while the address time was reduced. It may be ascribed to the change of charging tendency of $Zn_2SiO_4:Mn^{2+}$ phosphor by MgO coating, which makes it possible to stable wall-charge accumulation. When $Zn_2SiO_4:Mn^{2+}$ phosphor was coated with 1.3wt%-MgO, the address time was reduced 1.2 ${\mu}s$ and the address voltage lowered 25 V without any misfiring problem, compared to those of typical $Zn_2SiO_4:Mn^{2+}$ phosphor layer. The luminescence intensity of green cell using MgO-coated phosphor layer was also improved by 10%.

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Multiple ASR for efficient defense against brute force attacks (무차별 공격에 효과적인 다중 Address Space Randomization 방어 기법)

  • Park, Soo-Hyun;Kim, Sun-Il
    • The KIPS Transactions:PartC
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    • v.18C no.2
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    • pp.89-96
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    • 2011
  • ASR is an excellent program security technique that protects various data memory areas without run-time overhead. ASR hides the addresses of variables from attackers by reordering variables within a data memory area; however, it can be broken by brute force attacks because of a limited data memory space. In this paper, we propose Multiple ASR to overcome the limitation of previous ASR approaches. Multiple ASR separates a data memory area into original and duplicated areas, and compares variables in each memory area to detect an attack. In original and duplicated data memory areas variables are arranged in the opposite order. This makes it impossible to overwrite the same variables in the different data areas in a single attack. Although programs with Multiple ASR show a relatively high run-time overhead due to duplicated execution, programs with many I/O operations such as web servers, a favorite attack target, show 40~50% overhead. In this paper we develop and test a tool that transforms a program into one with Multiple ASR applied.