• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.2
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• pp.148-157
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• 2015

In this paper, we propose a compact antenna hat to perform RF compatibility testing efficiently between the launch vehicle and ground stations. The proposed structure implements a small size and low loss using the conductive shield instead of the conventional RF absorber. The S-band antenna hat, which is fabricated for an inverted-F onboard antenna with the size of $74mm{\times}13mm{\times}16mm$, has the small enclosure of $88mm{\times}35mm{\times}44mm$, the return loss of 25.6 dB, the insertion loss of 0.26 dB, and the leakage loss of 49.4 dB at the center frequency of 2.25 GHz. The simulated and measured results show a good agreement.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.5 no.1
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• pp.26-32
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• 2012

This paper presents a metamaterial absorber unit sell structure with four-element electric-LC resonators (ELC). In order to enhance the operating bandwidth of the proposed absorber unit cell two pairs of ELC resonators with a different size are used. The proposed unit cell shows negative permittivity and permeability when the electric field is parallel to the capacitive gap and the magnetic field is normal to the plane of ELC resonator. The simulated results show peak absorbance over 90% at two frequencies of 8.53 and 9.08 GHz, respectively.

• ETRI Journal
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• v.21 no.4
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• pp.1-8
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• 1999

Thick metal 0.8${\mu}m$ CMOS technology on high resistivity substrate(RF CMOS technology) is demonstrated for the L-band RF IC applications, and we successfully implemented it to the monolithic 900 MHz and 1.9 GHz CMOS LNAs for the first time. To enhance the performance of the RF circuits, MOSFET layout was optimized for high frequency operation and inductor quality was improved by modifying the technology. The fabricated 1.9 GHz LNA shows a gain of 15.2 dB and a NF of 2.8 dB at DC consumption current of 15mA that is an excellent noise performance compared with the offchip matched 1.9 GHz CMOS LNAs. The 900 MHz LNA shows a high gain of 19 dB and NF of 3.2 dB despite of the performance degradation due to the integrating of a 26 nH inductor for input match. The proposed RF CMOS technology is a compatibel process for analog CMOS ICs, and the monolithic LNAs employing the technology show a good and uniform RF performance in a five inch wafer.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.98-104
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• 2009

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.

• ETRI Journal
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• v.18 no.3
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• pp.171-179
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• 1996

Fully passivated low noise AlGaAs/InGaAs/GaAs pseudomorphic (PM) HEMT with wide head T-shaped gates were fabricated by dose split electron beam lithography (DSL). The dimensions of gate head and footprint were optimized by controlling the splitted pattern size, dose, and spaces of each pattern. We obtained stable T-shaped gate of $0.15{\mu}m$ gate length with $1.35{\mu}m-wide$ head. The maximum extrinsic transconductance was 560 mS/mm. The minimum noise figure measured at 18 GHz at $V_{ds}=2V andI_{ds}=17mA$ was 0.41 dB with associated gain of 8.19 dB. At 12 GHz, the minimum noise figure and an associated gain were 0.26 and 10.25 dB, respectively. These noise figures are the lowest values ever reported for GaAs-based HEMTs. These results are attributed to the extremely low gate resistance of wide head T-shaped gate having a ratio of the head to footprint dimensions larger than 9.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.312-318
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• 2016

This paper presents a 2-6 GHz GaN HEMT power amplifier monolithic microwave integrated circuit (MMIC) with bridged-T all-pass filters and output-reactance-compensation shorted stubs using the $0.25{\mu}m$ GaN HEMT foundry process that is developed by WIN Semiconductors, Inc. The bridged-T filter is modified to mitigate the bandwidth degradation of impedance matching due to the inherent channel resistance of the transistor, and the shorted stub with a bypass capacitor minimizes the output reactance of the transistor to ease wideband load impedance matching for maximum output power. The fabricated power amplifier MMIC shows a flat linear gain of 20 dB or more, an average output power of 40.1 dBm and a power-added efficiency of 19-26 % in 2 to 6 GHz, which is very useful in applications such as communication jammers and electronic warfare systems.

• ETRI Journal
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• v.26 no.3
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• pp.262-264
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• 2004

We investigate the characteristics of a wideband and high-gain cavity-backed slot antenna in terms of the reflection coefficients, radiation patterns, and gain. A cavity-backed slot antenna structure includes baffles, reflectors, and thick ground planes. The measured gain and bandwidth of a 10-dB return loss in a cavity-backed $2{\times}2$ array slot antenna with $h_1=2 $mm, d=2 mm are 15.5 dBi and nearly 27%, respectively, at 42 GHz. Baffles and reflectors are used to increase antenna gain, thus reducing the coupling among the slots on the thick ground plane.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.7B
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• pp.875-879
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• 2001

마이크로스트립 패치안테나의 대역을 증가시키는 방법이 꾸준히 연구되고 있다. 본 연구에서는 구형 패치 구조에 기생 소자를 더한 형태로 구형 패치 외부에 바(bar)와 밴드(band) 모양의 기생소자를 설치하여 프린징 효과를 최소화 하고자 하였으며, 이로 인한 안테나 효율의 향상과 대역폭을 증가를 시키고자 하였으며, 또한 기생소자의 폭과 방사안테나의 간격을 조절하여 대역폭과 임피던스정합 특성의 변화를 해석하였다. 이를 이용하여 LMDS통신 주파수 대역인 24.6GHz∼28.5GHz에서 공진 대역을 갖도록 설계하였다. 정재파비 2.0 이하를 기준으로 기존의 패치안테나의 중심주파수에 대한 대역 이용율이 수 %인데 반하여, 본 연구에서 제시한 밴드를 설치한 구조의 경우 12.92%로 증가함을 알 수 있고, 또한 본 연구에서 제시한 외부 밴드를 갖는 구조가 급전선로와 패치 안테나와의 정합특성이 월등함을 확인하였다.

• ETRI Journal
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• v.31 no.5
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• pp.601-603
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• 2009

This letter presents a high performance 2.4 GHz two-stage power amplifier (PA) operating in the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$ for IEEE 802.11g, wireless local area network application. It is implemented in InGaP/GaAs hetero-junction bipolar transistor technology and has a bias circuit employing a temperature compensation technique for error vector magnitude (EVM) performance. The technique uses a resistor made with a base layer of HBT. The design improves EVM performance in cold temperatures by increasing current. The implemented PA has a dynamic EVM of less than 4%, a gain of over 26 dB, and a current less than 130 mA below the output power of 19 dBm across the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.50-51
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• 2009

This paper presents integrated passive device (IPD) based on Wilkinson power divider. The simulated 2-way power divider has the insertion loss of 3.123 dB, output isolation of -24.576 dB, input return loss of 26.415 dB, and output return loss of 33.478 dB. The power divider is based on IPD process design simulation at 2.5 GHz for WiMAX (Worldwide Interoperability for Microwave Access) applications. The chip size of power divider is $1\;\times\;1.2\;mm^2$, which is under fabrication.