• Title/Summary/Keyword: 2.4GHz frequency

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Radar Imaging of Concrete Specimens with Improved Resolution Using Expanded Frequency Bandwidth (주파수 대역 확장을 이용한 콘크리트 시편의 레이더 영상 분해능 향상)

  • 임홍철;이주희
    • Journal of the Earthquake Engineering Society of Korea
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    • v.6 no.1
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    • pp.13-21
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    • 2002
  • Frequency bandwidth has been combined to determine adequate frequency bandwidth which is necessary for nondestructive testing when using inverse synthetic aperture radar(ISAR). For imaging inside of concrete specimens using radar, the principles of radar and signal processing are discussed. Experimental data obtained from radar measurement of three different concrete specimens at two different frequency bandwidths of 2∼3.4 GHz, 3.4∼5.8 GHz and these two frequencies are combined to obtain improved imagery. A signal processing scheme has been implemented to visualize inside concrete specimens. The influence of frequency bandwidth was analyzed in nondestructive testing by changing frequency bandwidth for concrete specimen.

Design and Implementation of CPW-Fed UWB Monopole Antenna (CPW 급전 방식을 이용한 UWB 모노폴 안테나 설계 및 구현)

  • Yu, Ju-Bong;Jeon, Jun-Ho;An, Chan-Kyu;Kim, Woo-Chan;Yang, Woon-Geun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.2
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    • pp.218-223
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    • 2010
  • In this paper, a novel CPW(Coplanar Waveguide)-fed UWB(Ultra Wide Band) antenna is designed, implemented, and measured for UWB communications. CPW-fed planar antenna has advantages of wide-bandwidth, low-cost and easy interaction with radio frequency front end circuitry. We have used HFSS(High Frequency Structure Simulator) of Ansoft which is based on the FEM(Finite Element Method) to simulate the proposed antenna. FR-4 substrate of thickness 1.6 mm and relative permitivity 4.4 is used for implementation. The proposed antenna showed VSWR(Voltage Standarding Wave Ratio)${\leq}2$ for the frequency band from 3.1 GHz to 10.6 GHz which is used for ultra wide band communication. Measured peak gains are 2.61, 4.95, 2.89, 7.35 dBi at 3, 6, 8, 11 GHz, respectively.

A Frequency Adjustable Double Lorentz CRLH Transmission Line using DGS (DGS를 이용한 주파수 가변 DL-CRLH 전송선로)

  • Lim, Jong-Sik;Lee, Jae-Hoon;Lee, Jun;Jeong, Yong-Chae;Han, Sang-Min;Ahn, Dal
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.8
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    • pp.1429-1435
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    • 2010
  • In this paper, a double lorentz composite right left handed(DL-CRLH) transmission line is designed using defected ground structure (DGS) and varactor diodes. Previously, the diode has been adopted only selectively for one of parallel or series resonators, and the balanced frequency as well as triple band frequencies were fixed. However in the proposed DL-CRLH transmission line, the balanced frequency, where the resonant frequencies of the series-connected parallel resonator and shunt-connected series resonator are the same, is adjustable. In addition, the triple band frequencies are controlled, too. The measured balanced frequency varies between 3.42~4.8GHz according to the controlled bias voltage. Under the same bias condition for the balanced frequency, the adjusted frequencies are 2.22~2.77GHz, 3.7~5.2GHz, 7.32~8.23GHz, 3.42~4.8GHz, and 4.44~5.92GHz for the conditions that ${\beta}d=+0.5{\pi}$, $-0.5{\pi}$, 2nd $+0.5{\pi}$, ${\omega}_{\infty}$, and ${\omega}_o$, respectively.

Wideband Frequency Tunable Metamaterial Absorber Using Switchable Ground Plane (그라운드를 전환하여 주파수를 가변할 수 있는 광대역 메타물질 흡수체)

  • Jeong, Heijun;Lim, Sungjoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.4
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    • pp.241-246
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    • 2018
  • In this study, we proposed a wideband frequency tunable metamaterial absorber using a switchable ground plane (SGP). We proposed two fire retardant or flame resistant 4 (FR4) substrate structures for the SGP. An SGP is placed at the middle layer, between the top pattern and the bottom ground plane. The SGP can either be made ground or reactive, by switching the PIN diode ON/OFF. As the frequency is determined by the substrate thickness, the frequency can be switched from the SGP. The proposed absorber is demonstrated by full-wave simulations and measurements. When the SGP is turned on, an absorptivity higher than 90% is achieved from 3.5 GHz to 11 GHz. When the SGP is turned off, an absorptivity higher than 90 % is achieved from 1.7 GHz to 5.2 GHz.

Design of Triple-band Triple Dipole Quasi-Yagi Antenna for WLAN and WiMAX Applications (무선 랜과 WiMAX 응용을 위한 삼중 대역 삼중 다이폴 준-야기 안테나 설계)

  • Yeo, Junho;Lee, Jong-Ig
    • Journal of Advanced Navigation Technology
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    • v.26 no.1
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    • pp.29-34
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    • 2022
  • In this paper, the design of a triple dipole quasi-yagi antenna operating in the 2.45 GHz and 5 GHz wireless LAN frequency bands and the 3.5 GHz WiMAX frequency band was studied. The proposed quasi-Yagi antenna consists of three dipoles connected in series with a V-shaped ground plane. The longest half-bow-tie-shaped dipole resonates in the 2.45 GHz band, whereas the medium-length dipole resonates at 3.5 GHz. The shortest dipole resonates in the 5 GHz band. By adjusting the length and width of the dipoles and the spacings between the dipoles, a triple-band directional antenna operating in the 2.45 GHz, 3.5 GHz, and 5 GHz bands are designed, and fabricated on an FR4 substrate with a size of 45 mm × 55 mm. It was confirmed that the fabricated antenna operates in the designed triple bands of 2.32-2.57 GHz, 3.26-3.69 GHz, and 4.50-6.56 GHz for a voltage standing wave ratio less than 2. Gain is maintained above 3 dBi in the three bands.

Design and Fabrication of 0.5~4 GHz Low Phase Noise Frequency Synthesizer (낮은 위상잡음 특성을 갖는 0.5~4 GHz 주파수 합성기 설계 및 제작)

  • Park, Beom-Jun;Park, Dong-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.3
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    • pp.333-341
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    • 2015
  • In this paper, a 0.5~4 GHz frequency synthesizer having good phase noise performance is proposed. Wideband output frequencies of the synthesizer were synthesized using DDS(Direct Digital Synthesizer) and analog direct frequency synthesis technology in order to obtain fast settling time. Also in order to get good phase noise performance, 2.4 GHz DDS clock was generated by VCO(Voltage Controlled Oscillator) which was locked by the 100 MHz reference oscillator using SPD(Sample Phase Detector). The phase noise performance of wideband frequency synthesizer was estimated and the results were compared with the measured ones. The measured phase noise of the frequency synthesizer was less then -121 dBc @ 100 kHz at 4 GHz.

Analysis of Performance for SC-FDE Systems Using Proportional Adaptive Equalizer in $2GHz{\sim}10GHz$ Frequency Radio Channel Models ($2GHz{\sim}10GHz$ 무선 채널 환경에서 비례 적응형 등화기를 이용한 SC-FDE 시스템 구현과 성능분석)

  • Yang, Yong-Seok;Lee, Kyu-Tae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.4C
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    • pp.447-453
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    • 2007
  • In the multipath fading channel, OFDM(Orthogonal Frequency Division Multiplexing)system possess the characteristics of ISI/ICIwith prefix, but a weak point of circuit complexity and PAPR problem. SC-FDE(Single Carrier with Frequency Domain Equalization) performance is similar to OFDM system, but equalizer is complex in frequency domain. In this paper, simple proportional equalizer offer for SC-FDE system, it useful method in the $2GHz{\sim}\;10GHz$ channel model such as indoor, outdoor, SUI. It prove using MATLAB simulation, speed faster then OFDM system, reduce terminal complexity in same test condition.

Design of Loop Type Inserting Slot Antenna to Apply Bluetooth/Zigbee/WiMax/WLAN(2.4~5.82 GHz) Band (Bluetooth/Zigbee/WiMAX/WLAN(2.4~5.82 GHz) 대역 응용을 위해 루프 형태를 삽입한 슬롯 안테나 설계)

  • Hong, Yoon-Gi;An, Sang-Chul;Jung, Hoon;Hong, Won-Gi;Jung, Cheon-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.5
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    • pp.435-443
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    • 2009
  • In this paper, we propose a microstrip slot antenna that works in Bluetooth, Zigbee, WiMAX and WLAN frequency bands($2.4{\sim}5.825\;GHz$). To get the wide bandwidth from the microstrip antenna proposed, we insert a pair of parastic strips along the feed line on the FR-4 dielectric substance(${\varepsilon}_r=4.8$). Furthermore, a simple geometrical rotation with quadrilateral slot is designed to maximize the bandwidth and to gain a wider frequency band than the conventional rectangular slot antenna. A additional design of the loop type is added to a cactus-shaped patched for 2.4 GHz ISM frequency band. The total measured bandwidth of the antenna is from 2.4 GHz to 6 GHz and the maximum gains of the antenna are 3.82 dBi, 4.48 dBi, 6.41 dBi and 6.65 dBi at the frequencies of 2.4 GHz, 3.5 GHz, 5.25 GHz and 5.77 GHz.

10 GHz TSPC(True Single Phase Clocking) Divider Design (10 GHz 단일 위상 분주 방식 주파수 분배기 설계)

  • Kim Ji-Hoon;Choi Woo-Yeol;Kwon Young-Woo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.8 s.111
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    • pp.732-738
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    • 2006
  • Divide-by-2 and divide-by-4 circuits which can operate up to 10 GHz are designed. A design method used in these circuits is the TSPC(True Single Phase Clocking) topology. The structure of the TSPC dividers is very simple because they need only a single clock and purely consist of smalt sized cmos devices. Through measurements, we find the fact that in proportion to the bias voltage, the free running frequency increases and the operation region also moves toward a higher frequency region. For operating conditions of bias voltage $3.0{\sim}4.0V$, input power 16dBm and dcoffset $1.5{\sim}2.0V$, 5 GHz and 2.5 GHz output signals divided by 2 and 4 are measured. The layout size of the divide-by-2 circuit is about $500{\times}500 um^2$($50{\times}40um^2$ except pad interconnection part).

A 54-GHz Injection-Locked Frequency Divider Based on 0.13-㎛ RFCMOS Technology (0.13-㎛ RFCMOS 공정 기반 54-GHz 주입 동기 주파수 분주기)

  • Seo, Hyo-Gi;Yun, Jong-Won;Rieh, Jae-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.5
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    • pp.522-527
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    • 2011
  • In this work, a 54 GHz divide-by-3 injection-locked frequency divider(ILFD) based on ring oscillator has been developed in a 0.13-${\mu}M$ Si RFCMOS technology for phase-locked loop(PLL) application. The free-running frequency is 18.92~19.31 GHz with tuning range of 0~1.8 V, consuming 70 mW with a 1.8 V supply voltage. At 0 dBm input power, the locking range is 1.02 GHz(54.82~55.84 GHz) and, with varactor tuning of 0~1.8 V, the total operating range is 2.4 GHz(54.82~57.17 GHz). The fabricated circuit size is 0.42 mm${\times}$0.6 mm including probing pads and 0.099 mm${\times}$0.056 mm for core area.