• ETRI Journal
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• v.26 no.6
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• pp.575-582
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• 2004

Fully-depleted silicon-on-insulator (FD-SOI) devices with a 15 nm SOI layer thickness and 60 nm gate lengths for analog applications have been investigated. The Si selective epitaxial growth (SEG) process was well optimized. Both the single- raised (SR) and double-raised (DR) source/drain (S/D) processes have been studied to reduce parasitic series resistance and improve device performance. For the DR S/D process, the saturation currents of both NMOS and PMOS are improved by 8 and 18%, respectively, compared with the SR S/D process. The self-heating effect is evaluated for both body contact and body floating SOI devices. The body contact transistor shows a reduced self-heating ratio, compared with the body floating transistor. The static noise margin of an SOI device with a $1.1\;{\mu}m^2$ 6T-SRAM cell is 190 mV, and the ring oscillator speed is improved by 25 % compared with bulk devices. The DR S/D process shows a higher open loop voltage gain than the SR S/D process. A 15 nm ultra-thin body (UTB) SOI device with a DR S/D process shows the same level of noise characteristics at both the body contact and body floating transistors. Also, we observed that noise characteristics of a 15 nm UTB SOI device are comparable to those of bulk Si devices.

• ETRI Journal
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• v.26 no.3
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• pp.229-240
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• 2004

This paper reports on our development of a dual-mode transceiver for a CMOS high-rate Bluetooth system-onchip solution. The transceiver includes most of the radio building blocks such as an active complex filter, a Gaussian frequency shift keying (GFSK) demodulator, a variable gain amplifier (VGA), a dc offset cancellation circuit, a quadrature local oscillator (LO) generator, and an RF front-end. It is designed for both the normal-rate Bluetooth with an instantaneous bit rate of 1 Mb/s and the high-rate Bluetooth of up to 12 Mb/s. The receiver employs a dualconversion combined with a baseband dual-path architecture for resolving many problems such as flicker noise, dc offset, and power consumption of the dual-mode system. The transceiver requires none of the external image-rejection and intermediate frequency (IF) channel filters by using an LO of 1.6 GHz and the fifth order onchip filters. The chip is fabricated on a $6.5-mm^{2}$ die using a standard $0.25-{\mu}m$ CMOS technology. Experimental results show an in-band image-rejection ratio of 40 dB, an IIP3 of -5 dBm, and a sensitivity of -77 dBm for the Bluetooth mode when the losses from the external components are compensated. It consumes 42 mA in receive ${\pi}/4-diffrential$ quadrature phase-shift keying $({\pi}/4-DQPSK)$ mode of 8 Mb/s, 35 mA in receive GFSK mode of 1 Mb/s, and 32 mA in transmit mode from a 2.5-V supply. These results indicate that the architecture and circuits are adaptable to the implementation of a low-cost, multi-mode, high-speed wireless personal area network.

• ETRI Journal
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• v.27 no.3
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• pp.304-311
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• 2005

We report on the fabrication of an AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) using a dielectric-defined process. This process was utilized to fabricate $0.12\;{\mu}m\;{\times}\;100 {\mu}m$ T-gate PHEMTs. A two-step etch process was performed to define the gate footprint in the $SiN_x$. The $SiN_x$ was etched either by dry etching alone or using a combination of wet and dry etching. The gate recessing was done in three steps: a wet etching for removal of the damaged surface layer, a dry etching for the narrow recess, and wet etching. A structure for the top of the T-gate consisting of a wide head part and a narrow lower layer part has been employed, taking advantage of the large cross-sectional area of the gate and its mechanically stable structure. From s-parameter data of up to 50 GHz, an extrapolated cut-off frequency of as high as 104 GHz was obtained. When comparing sample C (combination of wet and dry etching for the $SiN_x$) with sample A (dry etching for the $SiN_x$), we observed an 62.5% increase of the cut-off frequency. This is believed to be due to considerable decreases of the gate-source and gate-drain capacitances. This improvement in RF performance can be understood in terms of the decrease in parasitic capacitances, which is due to the use of the dielectric and the gate recess etching method.

• ETRI Journal
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• v.18 no.1
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• pp.15-27
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• 1996

The effects of $Nd_2O_3$ and $TiO_2$ addition on the microstructures and microwave dielectic properties of $BaO-Nd_2O_3-TiO_2$ system were investigated. $BaNd_2Ti_4O_{12}$ or $BaNd_2Ti_{5}O_{14}$ phases were observed for compositions based on BaO/$Nd_2O_3$ = 1 ratio. The compositions deviated from $BaO/Nd_2O_3=1$ ratio were composed of major phases of $BaNd_2Ti_4O_{12}$ or $BaNd_2Ti_5O_{14}$, and the compound of $Nd_2O_3$ and $TiO_2(Nd_2Ti_2O_7)$ or that of BaO and $TiO_2(BaTi_4O_9)$. The microstructure of ceramic with $BaO{\cdot}Nd_2O_3{\cdot}4TiO_2$ composition varied from spherical grains to needlelike grains with increasing sintering temperature. With increasing $Nd_2O_3$, the optimum sintering temperature with maximum density increased, and the dielectric constant(${\varepsilon}_r$) and quality factor(Q) decreased due to the formation of secondary phases. With increasing $TiO_2$, the optimum sintering temperature and the dielectric constant decreased with increased Q value. And the temperature coefficient of resonant frequency, ${\tau}_f$ shifted toward positive direction. The dielectric ceramics with $BaO/Nd_2O_3=1$ showed Q values of above 2000 and dielectric constants of above 80 at 3GHz.

• ETRI Journal
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• v.24 no.4
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• pp.290-298
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• 2002

We present, for the first time, a prototype active-matrix field emission display (AMFED) in which an amorphous silicon thin-film transistor (a-Si TFT) and a molybdenum-tip field emitter array (Mo-tip FEA) were monolithically integrated on a glass substrate for a novel active-matrix cathode (AMC) plate. The fabricated AMFED showed good display images with a low-voltage scan and data signals irrespective of a high voltage for field emissions. We introduced a light shield layer of metal into our AMC to reduce the photo leakage and back channel currents of the a-Si TFT. We designed the light shield to act as a focusing grid to focus emitted electron beams from the AMC onto the corresponding anode pixel. The thin film depositions in the a-Si TFTs were performed at a high temperature of above 360°C to guarantee the vacuum packaging of the AMC and anode plates. We also developed a novel wet etching process for $n^+-doped$ a-Si etching with high etch selectivity to intrinsic a-Si and used it in the fabrication of an inverted stagger TFT with a very thin active layer. The developed a-Si TFTs performed well enough to be used as control devices for AMCs. The gate bias of the a-Si TFTs well controlled the field emission currents of the AMC plates. The AMFED with these AMC plates showed low-voltage matrix addressing, good stability and reliability of field emission, and good light emissions from the anode plate with phosphors.

• ETRI Journal
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• v.23 no.4
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• pp.151-157
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• 2001

Spectroscopic and thermal analysis indicates that tellurite glasses doped with $B_2O_3$ and $GeO_2$ are promising candidate host materials for wide-band erbium doped fiber amplifier (EDFA) with a high 980 nm pump efficiency. In this study, we measured the thermal stabilities and the emission cross-sections for $Er^{3+}:^{4}I_{13/2}\;{\to}\;^{4}I_{15/2}$ transition in this tellurite glass system. We also determined the Judd-Ofelt parameters and calculated the radiative transition rates and the multiphonon relaxation rates in this glass system. The 15 mol% substitution of $B_2O_3$ for $TeO_2$ in the $Er^{3+}-doped\;75TeO_2-20ZnO-5K_2O$ glass raised the multiphonon relaxation rate for $^4I_{11/2}\;{\to}\;^4I_{13/2}$ transition from 4960 $s^{-1}$ to 24700 $s^{-1}$, but shortened the lifetime of the $^4I_{13/2}$ level by 14 % and reduced the emission cross-section for the $^4I_{13/2}\;{\to}\;^4I_{15/2}$ transition by 11%. The 15 mol% $GeO_2$ substitution in the same glass system also reduced the emission cross-section but increased the lifetime by 7%. However, the multiphonon relaxation rate for $^4I_{11/2}{\to}^4I_{13/2}$ transition was raised merely by 1000 $s^{-1}$. Therefore, a mixed substitution of $B_2O_3$ and $GeO_2$ for $TeO_2$ was concluded to be suitable for the 980 nm pump efficiency and the fluorescence efficiency of $^4I_{13/2}{\to}^4I_{15/2}$ transition in $Er^{3+}-doped$ tellurite glasses.

• ETRI Journal
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• v.38 no.4
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• pp.665-674
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• 2016

We designed and fabricated a semiconductor optical amplifier-integrated dual-mode laser (SOA-DML) as a compact and widely tunable continuous-wave terahertz (CW THz) beat source, and a pin-photodiode (pin-PD) integrated with a log-periodic planar antenna as a CW THz emitter. The SOA-DML chip consists of two distributed feedback lasers, a phase section for a tunable beat source, an amplifier, and a tapered spot-size converter for high output power and fiber-coupling efficiency. The SOA-DML module exhibits an output power of more than 15 dBm and clear four-wave mixing throughout the entire tuning range. Using integrated micro-heaters, we were able to tune the optical beat frequency from 380 GHz to 1,120 GHz. In addition, the effect of benzocyclobutene polymer in the antenna design of a pin-PD was considered. Furthermore, a dual active photodiode (PD) for high output power was designed, resulting in a 1.7-fold increase in efficiency compared with a single active PD at 220 GHz. Finally, herein we successfully show the feasibility of the CW THz system by demonstrating THz frequency-domain spectroscopy of an ${\alpha}$-lactose pellet using the modularized SOA-DML and a PD emitter.

• ETRI Journal
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• v.35 no.3
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• pp.425-430
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• 2013

In this paper, we propose a triple-gate trench power MOSFET (TGRMOS) that is made through a modified RESURF stepped oxide (RSO) process, that is, the nitride_RSO process. The electrical characteristics of TGRMOSs, such as the blocking voltage ($BV_{DS}$) and on-state current ($I_{D,MAX}$), are strongly dependent on the gate configuration and its bias condition. In the nitride_RSO process, the thick single insulation layer ($SiO_2$) of a conventional RSO power MOSFET is changed to a multilayered insulator ($SiO_2/SiN_x/TEOS$). The inserted $SiN_x$ layer can create the selective etching of the TEOS layer between the gate oxide and poly-Si layers. After additional oxidation and the poly-Si filling processes, the gates are automatically separated into three parts. Moreover, to confirm the variation in the electrical properties of TGRMOSs, such as $BV_{DS}$ and $I_{D,MAX}$, simulation studies are performed on the function of the gate configurations and their bias conditions. $BV_{DS}$ and $I_{D,MAX}$ are controlled from 87 V to 152 V and from 0.14 mA to 0.24 mA at a 15-V gate voltage. This $I_{D,MAX}$ variation indicates the specific on-resistance modulation.

• ETRI Journal
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• v.40 no.2
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• pp.188-196
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• 2018

This paper presents a pulse radar system to detect drones based on a target fluctuation model, specifically the Swerling target model. Because drones are small atypical objects and are mainly composed of non-conducting materials, their radar cross-section value is low and fluctuating. Therefore, determining the target fluctuation model and applying a proper integration method are important. The proposed system is herein experimentally verified and the results are discussed. A prototype design of the pulse radar system is based on radar equations. It adopts three different pulse modes and a coherent pulse integration to ensure a high signal-to-noise ratio. Outdoor measurements are performed with a prototype radar system to detect Doppler frequencies from both the drone frame and blades. The results indicate that the drone frame and blades are detected within an instrumental maximum range. Additionally, the results show that the drone's frame and blades are close to the Swerling 3 and 4 target models, respectively. By the analysis of the Swerling target models, proper integration methods for detecting drones are verified and can thus contribute to increasing in detectability.

• ETRI Journal
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• v.42 no.1
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• pp.129-137
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• 2020

All-solid-state batteries are promising energy storage devices in which high-energy-density and superior safety can be obtained by efficient cell design and the use of nonflammable solid electrolytes, respectively. This paper presents a systematic study of experimental factors that affect the electrochemical performance of all-solid-state batteries. The morphological changes in composite electrodes fabricated using different mixing speeds are carefully observed, and the corresponding electrochemical performances are evaluated in symmetric cell and half-cell configurations. We also investigate the effect of the composite electrode thickness at different charge/discharge rates for the realization of all-solid-state batteries with high-energy-density. The results of this investigation confirm a consistent relationship between the cell capacity and the ionic resistance within the composite electrodes. Finally, a concentration-gradient composite electrode design is presented for enhanced power density in thick composite electrodes; it provides a promising route to improving the cell performance simply by composite electrode design.