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Electronics and Telecommunications Research Institute (한국전자통신연구원)
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Electrical Characteristics of Triple-Gate RSO Power MOSFET (TGRMOS) with Various Gate Configurations and Bias Conditions

  • Na, Kyoung Il (Components & Materials Research Laboratory, ETRI) ;
  • Won, Jongil (Components & Materials Research Laboratory, ETRI) ;
  • Koo, Jin-Gun (Components & Materials Research Laboratory, ETRI) ;
  • Kim, Sang Gi (Components & Materials Research Laboratory, ETRI) ;
  • Kim, Jongdae (Strategy & Planning Division, ETRI) ;
  • Yang, Yil Suk (Components & Materials Research Laboratory, ETRI) ;
  • Lee, Jin Ho (Components & Materials Research Laboratory, ETRI)
  • Received : 2012.04.20
  • Accepted : 2012.11.26
  • Published : 2013.06.01
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Abstract

In this paper, we propose a triple-gate trench power MOSFET (TGRMOS) that is made through a modified RESURF stepped oxide (RSO) process, that is, the nitride_RSO process. The electrical characteristics of TGRMOSs, such as the blocking voltage ($BV_{DS}$) and on-state current ($I_{D,MAX}$), are strongly dependent on the gate configuration and its bias condition. In the nitride_RSO process, the thick single insulation layer ($SiO_2$) of a conventional RSO power MOSFET is changed to a multilayered insulator ($SiO_2/SiN_x/TEOS$). The inserted $SiN_x$ layer can create the selective etching of the TEOS layer between the gate oxide and poly-Si layers. After additional oxidation and the poly-Si filling processes, the gates are automatically separated into three parts. Moreover, to confirm the variation in the electrical properties of TGRMOSs, such as $BV_{DS}$ and $I_{D,MAX}$, simulation studies are performed on the function of the gate configurations and their bias conditions. $BV_{DS}$ and $I_{D,MAX}$ are controlled from 87 V to 152 V and from 0.14 mA to 0.24 mA at a 15-V gate voltage. This $I_{D,MAX}$ variation indicates the specific on-resistance modulation.

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References

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