In this paper, we design a direct radio frequency (RF) sampling receiver for multiband GNSS signals and demonstrate its performance. The direct RF sampling is a technique that does not use an analog mixer, but samples the passband signal directly, and all receiver processes are done in digital domain, whereas the conventional intermediate frequency (IF) receiver samples the IF band signals. In contrast to the IF sampling receiver, the RF sampling receiver is less complex in hardware, reconfigurable, and simultaneously converts multiband signals to digital signals with an analog-to-digital (AD) converter. The reconfigurability and simultaneous reception are very important in military applications where rapid change to other system is needed when a system is jammed by an enemy. For simultaneous reception of multiband signals, the sampling frequency should be selected with caution by considering the carrier frequencies, bandwidths, desired intermediate frequencies, and guard bands. In this paper, we select a sampling frequency and design a direct RF sampling receiver to receive multiband global navigation satellite system (GNSS) signals such as GPS L1, GLONASS G1 and G2 signals. The receiver is implemented with a commercial AD converter and software. The receiver performance is demonstrated by receiving the real signals.
Journal of the Korea Academia-Industrial cooperation Society
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v.16
no.4
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pp.2784-2790
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2015
The column-oriented database storage is a very advanced model for large-volume data transactions because of its superior I/O performance. Traditional data storages exploit row-oriented storage where the attributes of a record are placed contiguously in hard disk for fast write operations. However, for search-mostly data warehouse systems, column-oriented storage has become a more proper model because of its superior read performance. Recently, solid state drive using flash memory is largely recognized as the preferred storage media for high-speed data analysis systems. In this research, we propose a new transaction recovery scheme for a column-oriented database environment which is based on a flash media file system. We improved traditional shadow paging schemes by reusing old data pages which are supposed to be invalidated in the course of writing a new data page in the flash file system environment. In order to reuse these data pages, we exploit reused shadow list structure in our column-oriented shadow recovery(CoSR) scheme. CoSR scheme minimizes the additional storage overhead for keeping shadow pages and minimizes the I/O performance degradation caused by column data compression of traditional recovery schemes. Based on the results of the performance evaluation, we conclude that CoSR outperforms the traditional schemes by 17%.
Kim, Sunwook;Kim, Seongwoon;Kim, Hakyoung;Chung, Seongkwon;Lee, Sookyoung
KIISE Transactions on Computing Practices
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v.21
no.7
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pp.506-511
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2015
IOV is a technology that supports one or more virtual desktops, and can share a single physical device. In general, the virtual desktop uses the virtual IO devices which are provided by virtualization SW, using SW emulation technology. Virtual desktops that use the IO devices based on SW emulation have a problem in which service quality and performance are declining. Also, they cannot support the high-end application operations such as 3D-based CAD and game applications. In this paper, we propose a physical network separation system using Virtual Desktop Service based on HW direct assignments to overcome these problems. The proposed system provides independent desktops that are used to access the intranet or internet using server virtualization technology in a physical desktop computer for the user. In addition, this system can also support a network separation without network performance degradation caused by inspection of the network packet for logical network separations and additional installations of the desktop for physical network separations.
The existing smart grid device authentication system is concentrated on DCU, meter reading FEP and MDMS, and the authentication system for smart meters is not established. Although some cryptographic chips have been developed at present, it is difficult to complete the PKI authentication scheme because it is at the low level of simple encryption. Unlike existing power grids, smart grids are based on open two-way communication, increasing the risk of accidents as information security vulnerabilities increase. However, PKI is difficult to apply to smart meters, and there is a possibility of accidents such as system shutdown by sending manipulated packets and sending false information to the operating system. Issuing an existing PKI certificate to smart meters with high hardware constraints makes authentication and certificate renewal difficult, so an ultra-lightweight password authentication protocol that can operate even on the poor performance of smart meters (such as non-IP networks, processors, memory, and storage space) was designed and implemented. As a result of the experiment, lightweight cryptographic authentication protocol was able to be executed quickly in the Cortex-M3 environment, and it is expected that it will help to prepare a more secure authentication system in the smart grid industry.
This paper aims at developing 'gyro-mouse' which provides decent and comfortable human-computer interface that supports the usage of such software as an internet-browser in PC for the people paralyzed in upper limbs. This interface operates on information collected from head movement to get the cursor control. The interface is composed of two modules. One is hardware module in which the head horizontal and vertical angular velocities are detected and transmitted into PC. The other is a PC software that translates the received data into movement and click signals of the mouse. The ANN (artificial neural network) learns the quick nodding pattern of each user as click input so that it can provide user-friendly interface. The performance of the system was evaluated by three indices that are click recognition rate. error in cursor position control. and click rate of the moving target box. The performance result of the gyro-mouse was compared with that of the optical-mouse to assess the efficiency of the gyro-mouse. The average click recognition rate was 93%, average error in cursor position control was 1.4∼5 times of optical mouse. and the click rate with 50 pixels target box was 40%(30 clicks/min) to that of optical mouse. The click rate increased monotonously with the number of trial from 35% to 44%. The suggested system is expected to provide a new possibility to communicate with the society.
The mission-critical engagement control computer for air defense has to maintain its operation without any fault for a long mission time. The mission performed by large-scale and complex embedded software is extremely critical in terms of dependability and safety of computer system, and it is very important that engagement control computer has high reliability. The engagement control computer was implemented using four processors. The distributed computer composed of four processors quarantees the dependability and safety, and ASR fault-tolerant technique applied to each processor guarantees the reliability. In this paper, the mechanism and performance of ASR fault-tolerant technique are analysed. And MTBF, reliability, availability, and cost-effectiveness for ASR, DMR and TMR techniques applied to the engagement control computer are analysed. The mission-critical engagement control computer using software-based ASR fault-tolerant technique provides high reliability and fast recovery time at a low cost. The mission reliability of the engagement control computer using ASR technique in 4 processors board is almost same the reliability of the computer using TMR technique in 6 processors board. ASR technique is most suitable to the mission-critical engagement control computer.
Kim, Young Woo;Kim, Hong-Yeon;Bae, Seungjo;Kim, Hag-Young;Woo, Young-Choon;Park, Soo-Jun;Choi, Wan
KIPS Transactions on Software and Data Engineering
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v.2
no.2
/
pp.81-90
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2013
During the past decade, many changes and attempts have been tried and are continued developing new technologies in the computing area. The brick wall in computing area, especially power wall, changes computing paradigm from computing hardwares including processor and system architecture to programming environment and application usage. The high performance computing (HPC) area, especially, has been experienced catastrophic changes, and it is now considered as a key to the national competitiveness. In the late 2000's, many leading countries rushed to develop Exascale supercomputing systems, and as a results tens of PetaFLOPS system are prevalent now. In Korea, ICT is well developed and Korea is considered as a one of leading countries in the world, but not for supercomputing area. In this paper, we describe architecture design of MAHA supercomputing system which is aimed to develop 300 TeraFLOPS system for bio-informatics applications like human genome analysis and protein-protein docking. MAHA supercomputing system is consists of four major parts - computing hardware, file system, system software and bio-applications. MAHA supercomputing system is designed to utilize heterogeneous computing accelerators (co-processors like GPGPUs and MICs) to get more performance/$, performance/area, and performance/power. To provide high speed data movement and large capacity, MAHA file system is designed to have asymmetric cluster architecture, and consists of metadata server, data server, and client file system on top of SSD and MAID storage servers. MAHA system softwares are designed to provide user-friendliness and easy-to-use based on integrated system management component - like Bio Workflow management, Integrated Cluster management and Heterogeneous Resource management. MAHA supercomputing system was first installed in Dec., 2011. The theoretical performance of MAHA system was 50 TeraFLOPS and measured performance of 30.3 TeraFLOPS with 32 computing nodes. MAHA system will be upgraded to have 100 TeraFLOPS performance at Jan., 2013.
Journal of the Institute of Electronics and Information Engineers
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v.50
no.8
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pp.253-263
/
2013
Frequency Scanning Interferometry(FSI) system, one of the most promising optical surface measurement techniques, generally results in superior optical performance comparing with other 3-dimensional measuring methods as its hardware structure is fixed in operation and only the light frequency is scanned in a specific spectral band without vertical scanning of the target surface or the objective lens. FSI system collects a set of images of interference fringe by changing the frequency of light source. After that, it transforms intensity data of acquired image into frequency information, and calculates the height profile of target objects with the help of frequency analysis based on Fast Fourier Transform(FFT). However, it still suffers from optical noise on target surfaces and relatively long processing time due to the number of images acquired in frequency scanning phase. 1) a Polarization-based Frequency Scanning Interferometry(PFSI) is proposed for optical noise robustness. It consists of tunable laser for light source, ${\lambda}/4$ plate in front of reference mirror, ${\lambda}/4$ plate in front of target object, polarizing beam splitter, polarizer in front of image sensor, polarizer in front of the fiber coupled light source, ${\lambda}/2$ plate between PBS and polarizer of the light source. Using the proposed system, we can solve the problem of fringe image with low contrast by using polarization technique. Also, we can control light distribution of object beam and reference beam. 2) the signal processing acceleration method is proposed for PFSI, based on parallel processing architecture, which consists of parallel processing hardware and software such as Graphic Processing Unit(GPU) and Compute Unified Device Architecture(CUDA). As a result, the processing time reaches into tact time level of real-time processing. Finally, the proposed system is evaluated in terms of accuracy and processing speed through a series of experiment and the obtained results show the effectiveness of the proposed system and method.
It is quite difficult to actually prove the effectiveness of so-called target-hardening, one of the various strategies used to reduce crime, one of the serious problems in society recently. In particular, three to five minutes is often used as golden time for intruders to give up or stop, which is based on foreign and some indirect research cases in Korea, but there were no studies that more directly identified the average break-in operation time or the abandonment time based on the elapsed time when the shield hardware resists intruders. This study was the first of its kind in Korea to investigate and verify samples of 90 inmates of break-in burglars who were imprisoned in August 2018 by profiling the average criminal experience, education level, age, height and weight of typical Korean professional break-in thieves, and specific criminal methods, average break-in operation time, and the criteria for giving up if not breached. According to the analysis results, in the survey on the number of pre-invasion theft crimes by intruders, many of the respondents who participated in the survey were criminals of professional invasions, and by their physical characteristics, there was not much difference from ordinary adult men. Residential facilities were the highest in the world, followed by commercial and educational facilities. According to the survey on the types of facilities that committed intrusion into residential facilities, it was not safe to say that single-family housing accounted for the largest portion of single-family housing, multi-family housing, apartment high-rise (more than three stories), and apartment low-rise (more than one to three stories) among residential facilities, and that the ratio of apartment high-rise was higher than expected. Based on the average time required to break into a place for an intrusion crime, it is assumed that the psychological time worked in a place where the break-in was difficult, since the break-in was not performed while measuring the time of the break-in operation. In the case of time to give up a crime, more than half of the respondents said they would give up the crime even in less than four minutes, suggesting that a significant number of intrusive crimes can be prevented even if the facility has four minutes of intrusion resistance. This proves that most intruders will give up the break-in if the break-in resistance performance of the security facility is exercised for more than five minutes.
This paper describes ATM cell encipherment method using Rijndael Algorithm adopted as an AES(Advanced Encryption Standard) by NIST in 2001. ISO 9160 describes the requirement of physical layer data processing in encryption/decryption. For the description of ATM cell encipherment method, we implemented ATM data encipherment equipment which satisfies the requirements of ISO 9160, and verified the encipherment/decipherment processing at ATM STM-1 rate(155.52Mbps). The DES algorithm can process data in the block size of 64 bits and its key length is 64 bits, but the Rijndael algorithm can process data in the block size of 128 bits and the key length of 128, 192, or 256 bits selectively. So it is more flexible in high bit rate data processing and stronger in encription strength than DES. For tile real time encryption of high bit rate data stream. Rijndael algorithm was implemented in FPGA in this experiment. The boundary of serial UNI cell was detected by the CRC method, and in the case of user data cell the payload of 48 octets (384 bits) is converted in parallel and transferred to 3 Rijndael encipherment module in the block size of 128 bits individually. After completion of encryption, the header stored in buffer is attached to the enciphered payload and retransmitted in the format of cell. At the receiving end, the boundary of ceil is detected by the CRC method and the payload type is decided. n the payload type is the user data cell, the payload of the cell is transferred to the 3-Rijndael decryption module in the block sire of 128 bits for decryption of data. And in the case of maintenance cell, the payload is extracted without decryption processing.
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