• Korean Chemical Engineering Research
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• v.48 no.4
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• pp.470-474
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• 2010

In this study, we presents a simple microfluidic approach for generating uniform Poly(ethylene glycol)(PEG) microfiber. Elongated flow pattern of monomer induced by sheath flow of immiscible oil as continuous phase is generated in Y-shape junction and in situ polymerization by UV exposure. For uniform microfiber, we investigate the optimized flow condition and draw phase diagram as function of Ca and Qd. At the region for stable elongated flow pattern, the microfiber generated in microfluidic chip is very uniform and highly reproducible. Importantly, the thickness of microfibers can be easily controlled by flow rate of continuous and disperse phase. We also demonstrate the feasibility for biological application as encapsulating FITC-BSA in PEG microfiber.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.3
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• pp.2-17
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• 1999

Interpolated second order polynomials(ISOP's) are proposed to design efficient cascaded integrator-comb(CIC)-based decimation filters for a programmable downconverter. It is shown that some simple ISOP's can effectively reduce the passband droop caused by CIC filtering with little degradation in aliasing attenuation. In addition, ISOP's are shown to be useful for simplifying halfband filters that usually follow CIC filtering. As a result, a modified half band filter(MHBF) is introduced which is simpler than conventional halfband filters. The proposed decimation filter for a programmable downconverter is a cascade of a CIC filter, an ISOP, MHBF's and a programmable finite impulse response(FIR) filter. A procedure for designing the decimation filter is developed. In particular, an optimization technique that simultaneously designs the decimation filter is developed. In particular, an optimization technique that simultaneously designs the ISOP and programmable FIR filters is presented. Design examples demonstrate that the proposed method leads to more efficient programmable downconverters than existing ones.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1A
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• pp.37-52
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• 2004

In this paper, Multistage Adaptive Partial PIC eliminating effectively the multiple access and multipath interference for DS-CDMA based W-CDMA uplink system is designed and its performance is evaluated with computer simulation. By adaptively controlling the slope of the soft limiter with received signals, the efficiency of the soft limiter can be maximized and the better performance is obtained by solving error floor problem using further precise generation of interference signal. As a result, The proposed Multistage Adaptive Partial PIC with simple optimizing method for time-variant channel showed optimum performance at fewer stages. Besides fewer stages, the interference cancellation at the output of the rake receiver considerably reduced system complexity. The Multistage Adaptive Partial PIC with precise generation and efficient cancellation of interference signal can solve error eoor problem, resulted from initial false detection and improve system performance of high data rate system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.44-51
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• 2008

A stereo audio digital-to-analog converter (DAC) with a power amplifier using asymmetric pulse-width modulation (PWM) is presented. To adopt class-D amplifier mainly used in high-power audio appliances for head-phones application, this work analyzes the noise caused by the inter-channel interference during the integration and optimizes the design of the sigma-delta modulator to decrease the performance degradation caused by the noise. The asymmetric PWM is implemented to reduce switching noise and power loss generated from the power amplifier. This proposed architecture is fabricated in 0.13-mm CMOS technology. The proposed audio DAC including the power amplifier with single-ended output achieves a dynamic range (DR) of 95-dB dissipating 4.4-mW.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.4
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• pp.25-35
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• 2002

This work describes an 8b 200MHz time-interleaved subranging analog-to-digital converter (ADC) based on a single-poly digital CMOS process. Two fine ADCs for lower digital bits of the proposed ADC employ a time-sharing double-channel architecture to increase system speed and a new reference voltage switching scheme to reduce settling time of the reference voltages and chip area. The proposed intermeshed resistor string, which generates reference voltages for fine ADCs, improves linearity and settling time of the reference voltages simultaneously. The proposed sample- and-hold amplifier(SHA) is based on a highly linear common-drain amplifier and passive differential circuits to minimize power consumption and chip area with 8b accuracy and employs input dynamic common mode feedback circuits for high dynamic performance at a 200MHz sampling rate. A new encoding circuit in a coarse ADC simplifies the signal processing between the coarse ADC and two successive fine ADCs.

• The Journal of the Acoustical Society of Korea
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• v.22 no.4
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• pp.276-285
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• 2003

In this paper, we present real-time implementation of a R2MFC/DTMF (R2 Multi Frequency Combinations/Dual Tone Multiple Frequency) tone receiver/sender using a high performance DSP (Digital Signal Processor) and apply it to a carrier class VoIP (Voice over Internet Protocol) gateway system. The Receiver utilizes the Goertzel filter and the sender adopts the harmonic resonant filter. We describe, in detail, the techniques of multi-channel real-time implementation on a Texas Instruments TMS320C62x DSP such as effective PCM (Pulse Code Modulation) in/out by means of DMA (Direct Memory Access) and McBSP (Multi Channel Buffered Serial Port) and message communication via HPI (Host Port Interface), etc. From experimental results, we confirmed that the optimized code provided 780 channel capacity at 250㎒ C6202, and the our R2MFC/DTMF receiver/sender met ITU-T (International Telecommunication Union-Telecommunication) specifications.

• The Journal of Engineering Research
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• v.3 no.1
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• pp.97-106
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• 1998

In this paper, we analyze the WLL systems with high chip rate, which virtually eliminates the multipath fading effects by appling space diversity functions. First, we found out the capacity of reverse link which resulted from performing computer simulation of the transmission and reception of the WLL systems to evaluate the performance of the WLL systems in real environment. Besides, we analyze the radio propagation medium and the link budget and from the results, made RCSU for providing of the AWGN multipath fading channel. This RCSU is produced to characterize the urban radio propagation medium in various environments. From the simulation results, diversity gains increase as depth of fading becomes deeper. We also confirm that the systems applied diversity reduce the effects of multipath fading phenomena which cause to degrade the performance of WLL systems, based on the results $E_b/N_o$ and BER curve.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.1 s.343
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• pp.95-102
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• 2006

In this paper, we present the performance analysis and design of a multi-path searcher operating over Rayleigh fading channels when multiple transmit antennas are employed in the down-link of W-CDMA system. The simulation results for the receiver operating characteristics (ROC) for 1, 2, and 4 transmit antennas are presented to corroborate the theoretical analyses. We also propose a procedure to find the optimum parameters of double-dwell serial searcher according to the number of the multiple transmit antennas. Our analyses and simulations indicate that post-detection integration is not necessary when the number of transmit antennas is more than two. Finally, we found that increasing transmit diversity order does not necessarily improve the detection performance when the received pilot signal strength is relatively low. Therefore, this gives us a practical criterion on increasing transmit diversity order.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.10
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• pp.783-790
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• 2018

The frequency-hopping technique is one of the spread-spectrum techniques. Frequency hopping is a communication system in which the carrier frequency channel is hopped within the wideband. Therefore, a frequency-hopping system has such advantages as antijamming and low probability of intercept. This system is often used in military communications. Because frequency-hopping signal detection is difficult, it is an important research issue. A novel detection technique is proposed that can improve detection probability. When the received signal is transformed to a frequency domain sample by fast Fourier transform, spectral leakage lowers the detection probability. This problem can be solved by using the Hamming window, and the detection probability can be increased. However, in a frequency-hopping environment, the windowing technique lowers the detection probability. The proposed method solves this weakness. The simulation results show that the proposed detection technique improves the detection probability by as much as 13 %.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.347.2-347.2
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• 2014

최근, 비정질 산화물 반도체 thin film transistor (TFT)는 수소화된 비정질 실리콘 TFT와 비교하여 높은 이동도와 큰 on/off 전류비, 낮은 구동 전압을 가짐으로써 빠른 속도가 요구되는 차세대 투명 디스플레이의 TFT로 많은 연구가 진행되고 있다. 한편, 기존의 Thin-Film-Transistor 제작 시 우수한 박막을 얻기 위해서는 $500^{\circ}C$ 이상의 높은 열처리 온도가 필수적이며 이는 유리 기판과 플라스틱 기판에 적용하는 것이 적합하지 않고 높은 온도에서 수 시간 동안 열처리를 수행해야 하므로 공정 시간 및 비용이 증가하게 된다는 단점이 있다. 이러한 점을 극복하기 위해 본 연구에서는 간단하고, 낮은 제조비용과 대면적의 박막 증착이 가능한 용액공정을 통하여 박막 트랜지스터를 제작하였으며 thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화하였다. P-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 spin coater을 이용하여 Al-Zn-Sn-O 박막을 형성하였다. 그리고, baking 과정으로 $180^{\circ}C$의 온도에서 10분 동안의 열처리를 실시하였다. 연속해서 Photolithography 공정과 BOE (30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 Junctionless TFT 구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성을 간단하고 간략화 된 공정과정으로 분석할 수 있는 장점이 있다. 열처리 조건으로는 thermal 열처리의 경우, furnace를 이용하여 $500^{\circ}C$에서 30분 동안 N2 가스 분위기에서 열처리를 실시하였고, microwave 열처리는 microwave 장비를 이용하여 각각 400 W, 600 W, 800 W, 1000 W로 15분 동안 실시하였다. 그 결과, furnace를 이용하여 열처리한 소자와 비교하여 microwave를 통해 열처리한 소자에서 subthreshold swing (SS), threshold voltage (Vth), mobility 등이 비슷한 특성을 내는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.