• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.7
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• pp.4871-4877
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• 2015

This article presents a circuit and a system for IEEE 1588 based clock synchronization to generate a very accurate frequency signal required in femtocell devices. A prototype board and the experimental environment to verify the functions and to evaluate the performance are explained to verify the feasibility of the proposed synchronization system. To make low-cost femtocells without constraints on the place of installation, it is very important to study on the practical implementation of synchronization system based on IEEE 1588. The experimental result shows that the synchronization errors between -16 ns and 9 ns are guaranteed over the network of femtocell devices with the proposed synchronization circuits, thus the synchronization criteria of the 3GPP HNB are met.

• Journal of Advanced Navigation Technology
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• v.26 no.6
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• pp.441-447
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• 2022

In this paper, we propose a FLL-assisted-PLL based time synchronization algorithm for telemetry systems where frequency and phase errors exist in time synchronization pulse. The telemetry system may analyze the flight state by acquiring the state information in the distributed system. Therefor, in order to collect each state information without errors, precise time synchronization between the master and the slave is required. At this time, the master's time pulse have frequency and phase changes that can be caused by external and internal factors, so a method to maintain precision time synchronization is essential to provide telemetry data continuously. We propose the FLL-assisted-PLL based algorithm that is capable of high-speed synchronization and has high time synchronization accuracy. The proposed algorithm is verified through python simulation, and the VHDL Logic has been implemented in FPGA to check the performance according to the frequency errors and phase errors.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.8
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• pp.1631-1641
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• 2012

A TDMA system in satellite communication has been utilized. Especially DVB-S2 was standardized and now operated in satellite broadcasting system. In this paper, we propose a TDMA frame structure appropriate for special purpose which has the good reliablilty in a poor RF environment even if frequency efficiency is decreased. TDMA frame duration is 12 seconds which is long duration in comparison with general TDMA system with several ms. Designing the frame structure, time and frequency shift in single frame duration are considered. Simulation results show that the proposed frame structure and synchronization method has robust synchronization performance when the terminal is even in low SNR as well as 25 kHz frequency offsets.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.587-594
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• 2010

In this paper, we propose an asynchronous IR-UWB ranging system based on the two-way ranging protocol. The periodic pulse sequence is used to measure a distance between two devices. At the receiver, a received signal is first transformed into a frequency-domain signal using an analog correlator bank and digital signal processing is followed in the frequency-domain. This make it possible for the system to use an ADC with a conversion speed of pulse rate. The proposed algorithm at the receiver side includes a peak detection procedure using mutipath channel compensation and matched filtering, and retransmits a pulse sequence synchronized with the detected peak. The validity of the proposed algorithm is verified from simulation results where the CM1 channel is assumed.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.3
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• pp.81-86
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• 2010

Since CORDIC (COordinate Rotation DIgital Computer) is able to carry out the phase operation, such as vector to phase conversion or rotation of vectors, with adders and shifters, it is well suited for the design of the frequency synchronization unit in OFDM receivers. It is not easy, however, to fully utilize the CORDIC in the OFDM demodulator because of the non-linear characteristics of the direction sequence (DS), which is the representation of the phase in CORDIC. In this paper a new representation method is proposed to linearize the direction sequence approximately. The maximum phase error of the linearized binary direction sequence (LBDS) is also discussed. For the purpose of designing the hardware, the architectures for the binary DS (BDS) to LBDS converter and the LBDS to BDS inverse converter are illustrated. Adopting LBDS, the overall frequency synchronization hardware for OFDM receivers can be implemented fully utilizing CORDIC and general arithmetic operators, such as adders and multipliers, for the phase estimation, loop filtering of the frequency offset, derotation for the frequency offset correction. An example of the design of 22 bit LBDS for the T-DMB demodulator is also presented.

• The Journal of the Acoustical Society of Korea
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• v.39 no.2
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• pp.69-76
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• 2020

This paper deals with a method of transmitting depth information of a high-speed underwater vehicle. The depth information signal transmitted from the high-speed mobile object is received with high frequency variability. In the proposed method, we apply not only frequency synchronization but also additional synchronization on the time axis like the existing method. In the case of a Doppler frequency bank with less resolution than the conventional method through simulations performed in the environment moving up to 50 kn, and the depth information is recovered using the proposed method, the error rate of 6 % ~ 9 % is reduced to 0.2 % ~ 1 %.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.7C
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• pp.706-712
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• 2006

In this letter, we propose a compact CORDIC processor for implementation of carrier frequency synchronization block in an OFDM (Orthogonal Frequency Division Multiplexing) system. The compact CORDIC processor is proposed by using inherenct properties of an OFDM system for estimation and compensation of carrier frequency offset, and is composed of a compact CORDIC preprocessor and a compact CORDIC processor. The compact CORDIC preprocessor plays a role of normalizing input signal efficiently, and the compact CORDIC processor is proposed to perform the vectoring mode and rotational mode jointly in CORDIC operation for carrier frequency synchronization. It is shown by FPGA implementation that the proposed compact CORDIC processor can achieve better performance with a significantly reduced hardware complexity than the conventional CORDIC approach.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.7A
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• pp.725-733
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• 2006

In this paper, we propose an algorithm which makes the frequency of output signal synchronize with frequency of input signal in Equalization Digital On-channel Repeater (EDOCR) system which was proposed to overcome the disadvantage of conventional Digital On-Channel Repeater (DOCR). Also, we verify the algorithm by using the mathematical equivalent model and analysis the performance by implying the algorithm to EDOCR. The main idea is to use the frequency offset information, which comes from carrier recovery in the receiving part of EDOCR, when the demodulated symbol is re-modulated in transmitting part. Based on the proposed algorithm, EDOCR not only makes the output signal synchronized with input signal in frequency but also emit the output signal which satisfies the ATSC transmission standard without additional equipments such as Global Positioning System (GSP).

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.2
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• pp.141-146
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• 2016

This paper presents a method to improve time interval error for asynchronous communication systems. The proposed method is designed and simulated with multi-phase VCO, interpolator, phase selector, up-down counter, comparator and adder. The simulation results for CAN communication system show that the maximum time interval error can be tightly managed for satisfying the required specification. The proposed frequency modulation method can be properly used for asynchronous communication systems requiring high reliability.

• Korean Journal of Optics and Photonics
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• v.10 no.6
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• pp.507-511
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• 1999

A 10 GHz timing extracted signal which is phase-locked to a 10 Gbit/s mode-locked optical fiber laser pulse train is obtained using a tour-wave-mixing signal in semiconductor optical amplifier. The phase-locked loop wm, demonstrated ~Llccessful1y over 8 hours and found to have the lock-in frequency range of 30 KHz. 0 KHz.