• Title/Summary/Keyword: 정합회로

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The design of the matched filter for CDMA rapid initial PN code synchronization acquisition using HW reuse scheme (CDMA 고속초기동기획득을 위한 HW 재사용에 의한 정합필터의 설계)

  • Lim, Myoung-Seob
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.11
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    • pp.28-36
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    • 1998
  • In the CDMA mobile communication system with asynchronous mode among base stations, the initial PN code acquisition method using a matched filter can be considered for the rapid PN code synchronization acquisition in the handoff region. In the model of the noncoherent QPSK/DS-SS under the Rayleigh fading channel, the mean acquisttion time of the matched filter is analyzed to have a shortened time in proportion to the length of matched filter to be compared with the serial correlation method. In this paper to improve the HW complexity of the conventional matched device which enables the repeated correlation process, is designed and its function is verified through the FPGAsimulation using Altera MaxPlus Ⅱ.

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In/Output Matching Network Based on Novel Harmonic Control Circuit for Design of High-Efficiency Power Amplifier (고효율 전력증폭기 설계를 위한 새로운 고조파 조절 회로 기반의 입출력 정합 회로)

  • Choi, Jae-Won;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.2
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    • pp.141-146
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    • 2009
  • In this paper, a novel harmonic control circuit has been proposed for the design of high-efficiency power amplifier with Si LDMOSFET. The proposed harmonic control circuit haying the short impedances for the second- and third-harmonic components has been used to design the in/output matching network. The efficiency enhancement effect of the proposed harmonic control circuit is superior to the class-F or inverse class-F harmonic control circuit. Also, when the proposed harmonic control circuit has been adapted to the input matching network as well as the output matching network, the of ficiency enhancement effect of the proposed power amplifier has increased all the more. The measured maximum power added efficiency (PAE) of the proposed power amplifier is 82.68% at 1.71GHz band. Compared with class-F and inverse class-F amplifiers, the measured maximum PAE of the proposed power amplifier has increased in $5.08{\sim}9.91%$.

Nonresonant-Pump Four Wave Mixing : New Scheme of Phase Matching for Third Order Nonlinear Laser Spectroscopy (비공명펌프 사광자혼합 : 3차 비선형 레이저 분광법을 위한 새로운 위상정합법)

  • 이은성;최대식;이재용;한재원
    • Proceedings of the Optical Society of Korea Conference
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    • 2002.07a
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    • pp.222-223
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    • 2002
  • 3차 비선형 광학현상을 이용한 레이저 분광학은 코헤런트 반스톡스 라만산란(Coherent Anti-Stokes Raman Scattering, CARS)이나 축퇴 사광자혼합(Degenerate Four-Wave Mixing, DFWM)이 기계공학의 연소진단이나 화학분야에 응용된 이래 활발히 연구되어져왔다.[1] 비선형 광학현상의 특성상, 발생한 신호는 입사 레이저광들과의 위상정합조건이 만족되는 특정한 방향으로만 진행하고 레이저광처럼 가간섭성을 갖는다. (중략)

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A QPSK clock recovery circuit based on a combined filter (결합 보간 필터를 이용한 QSPK Clock Recovery 회로)

  • 신은정;장일순;김응배;조경록
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.6B
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    • pp.840-847
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    • 2001
  • 본 논문에서는 클럭 동기 회로에 사용되는 다차 함수 형태의 결합 필터를 선형 근사화 하는 알고리즘을 제안하고 이를 하드웨어로 구현한다. 정합 필터와 보간필터에 의한 클럭 동기회로는 수신기를 전 디지털 회로를 구현하기 위해 선호되지만 계산량이 증가하는 단점이 있다. 본 논문에서는 정합 필터의 임펄스 응답을 갖는 결합 보간 필터를 구현하고, base 함수의 적용을 선형 근사화 하여 필터의 계산량을 감소시켰다. 본 논문에서는 선형 근사화된 결합 보간 필터의 동작을 Matlab을 통한 시뮬레이션과 ALTERA Chip으로 테스트하였다.

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Stereo Disparity Estimation by Analyzing the Type of Matched Regions (정합영역의 유형분석에 의한 스테레오 변이 추정)

  • Kim Sung-Hun;Lee Joong-Jae;Kim Gye-Young;Choi Hyung-Il
    • Journal of KIISE:Software and Applications
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    • v.33 no.1
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    • pp.69-83
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    • 2006
  • This paper describes an image disparity estimation method using a segmented-region based stereo matching. Segmented-region based disparity estimation yields a disparity map as the unit of segmented region. However, there is a problem that it estimates disparity imprecisely. The reason is that because it not only have matching errors but also apply an identical way to disparity estimation, which is not considered each type of matched regions. To solve this problem, we proposes a disparity estimation method which is considered the type of matched regions. That is, the proposed method classifies whole matched regions into similar-matched region, dissimilar-matched region, false-matched region and miss-matched region by analyzing the type of matched regions. We then performs proper disparity estimation for each type of matched regions. This method minimizes the error in estimating disparity which is caused by inaccurate matching and also improves the accuracy of disparity of the well-matched regions. For the purpose of performance evaluations, we perform tests on a variety of scenes for synthetic, indoor and outdoor images. As a result of tests, we can obtain a dense disparity map which has the improved accuracy. The remarkable result is that the accuracy of disparity is also improved considerably for complex outdoor images which are barely treatable in the previous methods.

Reduced-bit transform based block matching algorithm via SAD (영상의 저 비트 변환을 이용한 SAD 블록 정합 알고리즘)

  • Kim, Sang-Chul;Park, Soon-Yong;Chien, Sung-Il
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.1
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    • pp.107-115
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    • 2014
  • The reduced-bit transform based bit-plane matching algorithm (BPM) can obtain the block matching result through its simple calculation and hardware design compared to the conventional block matching algorithms (BMAs), but the block matching accuracy of BPMs is somewhat low. In this paper, reduced-bit transform based sum of the absolute difference (R-SAD) is proposed to improve the block matching accuracy in comparison with the conventional BPMs and it is shown that the matching process can be obtained using the logical operations. Firstly, this method transforms the current and the reference images into their respective 2-bit images and then a truth table is obtained from the relation between input and output 2-bit images. Next, a truth table is simplified by Karnaugh map and the absolute difference is calculated by using simple logical operations. Finally, the simulation results show that the proposed R-SAD can obtain higher accuracy in block matching results compared to the conventional BPMs through the PSNR analysis in the motion compensation experiments.

Real-Time Feature Point Matching Using Local Descriptor Derived by Zernike Moments (저니키 모멘트 기반 지역 서술자를 이용한 실시간 특징점 정합)

  • Hwang, Sun-Kyoo;Kim, Whoi-Yul
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.46 no.4
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    • pp.116-123
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    • 2009
  • Feature point matching, which is finding the corresponding points from two images with different viewpoint, has been used in various vision-based applications and the demand for the real-time operation of the matching is increasing these days. This paper presents a real-time feature point matching method by using a local descriptor derived by Zernike moments. From an input image, we find a set of feature points by using an existing fast corner detection algorithm and compute a local descriptor derived by Zernike moments at each feature point. The local descriptor based on Zernike moments represents the properties of the image patch around the feature points efficiently and is robust to rotation and illumination changes. In order to speed up the computation of Zernike moments, we compute the Zernike basis functions with fixed size in advance and store them in lookup tables. The initial matching results are acquired by an Approximate Nearest Neighbor (ANN) method and false matchings are eliminated by a RANSAC algorithm. In the experiments we confirmed that the proposed method matches the feature points in images with various transformations in real-time and outperforms existing methods.

Design of broad-band impedance matching networks for hybrid microwave amplifier applications (하이브리드 마이코로파 광대역 증폭기용 임피던스 정합회로 설계)

  • 김남태
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.5
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    • pp.11-17
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    • 1998
  • In this paper, the synthesis procedufe of impedance matching network is presented for broad-band microwave amplifier design, whereby amplifier operating in the octave bandwidth is designed and fabricated in detail. The transfer function of the matching netowrks is synthesized by chebyshev approximation and element values for the networks of specified topology are calculatd for various MILs and ripples. After the transistor is modeled by negative-image device model, the synthesis procedure for matching networks is applied to broad-band amplifier design which has electrical performance of about 12dB gain in 4 to 8GHz range. Experimental results obtained from the fabricated amplifier are shown to approach the electrical performance designed in the given frequency range. Construction of the impedance matching networks by transfer function synthesis is very useful method for the design of broad-band microwave amplifiers.

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Estimation of Equivalent Circuit Parameters of Underwater Acoustic Piezoelectric Transducer for Matching Network Design of Sonar Transmitter (소나 송신기의 정합회로 설계를 위한 수중 음향 압전 트랜스듀서의 등가회로 파라미터 추정)

  • Lee, Jeong-Min;Lee, Byung-Hwa;Baek, Kwang-Ryul
    • Journal of the Korea Institute of Military Science and Technology
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    • v.12 no.3
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    • pp.282-289
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    • 2009
  • This paper presents an estimation technique of the equivalent circuit parameters for an underwater acoustic piezoelectric transducer from the measured impedance. Estimated equivalent circuit can be used for the design of the impedance matching network of the sonar transmitter. A fitness function is proposed to minimize the error between the calculated impedance of the equivalent circuit and the measured impedance of the transducer. The equivalent circuit parameters are estimated by using the fitness function and the PSO(Particle Swarm Optimization) algorithm. The effectiveness of the proposed method is verified by the applications to a sandwich-type transducer and a dummy load. In addition, the impedance matching network is also designed by using the estimated equivalent circuit model.