Journal of the Institute of Electronics and Information Engineers (전자공학회논문지)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Reduced-bit transform based block matching algorithm via SAD

영상의 저 비트 변환을 이용한 SAD 블록 정합 알고리즘

  • Kim, Sang-Chul (TV R&D Center, LG Electronics) ;
  • Park, Soon-Yong (School of Computer Science and Engineering, Kyungpook National University) ;
  • Chien, Sung-Il (School of Electronics Engineering, Kyungpook National University)
  • 김상철 ((주) LG전자 TV연구소) ;
  • 박순용 (경북대학교 IT대학 컴퓨터학부) ;
  • 진성일 (경북대학교 IT대학 전자공학부)
  • Received : 2013.10.18
  • Published : 2014.01.25
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Abstract

The reduced-bit transform based bit-plane matching algorithm (BPM) can obtain the block matching result through its simple calculation and hardware design compared to the conventional block matching algorithms (BMAs), but the block matching accuracy of BPMs is somewhat low. In this paper, reduced-bit transform based sum of the absolute difference (R-SAD) is proposed to improve the block matching accuracy in comparison with the conventional BPMs and it is shown that the matching process can be obtained using the logical operations. Firstly, this method transforms the current and the reference images into their respective 2-bit images and then a truth table is obtained from the relation between input and output 2-bit images. Next, a truth table is simplified by Karnaugh map and the absolute difference is calculated by using simple logical operations. Finally, the simulation results show that the proposed R-SAD can obtain higher accuracy in block matching results compared to the conventional BPMs through the PSNR analysis in the motion compensation experiments.

영상의 저 비트 변환 기반의 비트 플레인 정합방법(Bit-Plane Matching : BPM)은 기존의 블록 정합 방법들과 비교해 계산량을 줄이고 간단한 하드웨어 구조 설계를 통해 블록 정합 결과를 획득할 수 있지만, 블록 정합의 정확도가 비교적 낮은 문제점을 가지고 있다. 본 논문에서는 기존의 BPM방법들과 비교해 블록 정합의 정확도를 증가시키면서 동시에 논리 연산으로 정합 결과를 계산할 수 있는 저 비트 변환 기반의 절대 오차합(Reduced-bit transform based Sum of Absolute Difference : R-SAD)을 이용한 블록 정합 알고리즘을 제안한다. 이 방법은 현재 영상과 참조영상을 각각 2-bit의 영상으로 변환하고, 2-bit의 4레벨에 대한 입출력 관계를 이용하여 진리표를 획득한다. 진리표는 Karnaugh map을 통해 간소화 되어 논리 연산으로 절대 오차를 계산할 수 있다. 제안된 방법의 성능 평가를 위한 움직임 보상(Motion Compensation) 실험에서, R-SAD는 기존의 블록 정합 방법들과 비교해 높은 정확도의 정합결과를 획득할 수 있었다.

Keywords

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