• Title/Summary/Keyword: 전자 재료

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Recent Research Trends in Touchscreen Readout Systems (최근 터치스크린 Readout 시스템의 연구 경향)

  • Jun-Min Lee;Ju-Won Ham;Woo-Seok Jang;Ha-Min Lee;Sang-Mo Koo;Jong-Min Oh;Seung-Hoon Ko
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.36 no.5
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    • pp.423-432
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    • 2023
  • With the increasing demand for mobile devices featuring multi-touch operation, extensive research is being conducted on touch screen panel (TSP) Readout ICs (ROICs) that should possess low power consumption, compact chip size, and immunity to external noise. Therefore, this paper discusses capacitive touch sensors and their readout circuits, and it introduces research trends in various circuit designs that are robust against external noise sources. The recent state-of-the-art TSP ROICs have primarily focused on minimizing the impact of parasitic capacitance (Cp) caused by thin panel thickness. The large Cp can be effectively compensated using an area-efficient current compensator and Current Conveyor (CC), while a display noise reduction scheme utilizing a noise-antenna (NA) electrode significantly improves the signal-to-noise ratio (SNR). Based on these achievements, it is expected that future TSP ROICs will be capable of stable operation with thinner and flexible Touch Screen Panels (TSPs).

Influence of Oxide Fabricated by Local Anodic Oxidation in Silicon (실리콘에 Local Anodic Oxidation으로 만든 산화물의 영향)

  • Jung, Seung-Woo;Byun, Dong-Wook;Shin, Myeong-Cheol;Schweitz, Michael A.;Koo, Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.34 no.4
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    • pp.242-245
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    • 2021
  • In this work, we fabricated oxide on an n-type silicon substrate through local anodic oxidation (LAO) using atomic force microscopy (AFM). The resulting oxide thickness was measured and its correlation with load force, scan speed and applied voltage was analyzed. The surface oxide layer was stripped using a buffered oxide etch. Ohmic contacts were created by applying silver paste on the silicon substrate back face. LAO was performed at approximately 70% humidity. The oxide thickness increased with increasing the load force, the voltage, and reducing the scan speed. We confirmed that LAO/AFM can be used to create both lateral and, to some extent, vertical shapes and patterns, as previously shown in the literature.

Post-annealing Effect of NiO Thin Film Grown by RF Sputtering System on 4H-SiC Substrate (4H-SiC 기판 위에 RF Sputter로 증착된 NiO 박막의 후열처리 효과)

  • Soo-Young Moon;Min-Yeong Kim;Dong-Wook Byun;Geon-Hee Lee;Sang-Mo Koo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.36 no.2
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    • pp.170-174
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    • 2023
  • Nickel oxide is a nonstoichiometric transparent conductive oxide with p-type conductivity, a wide-band energy gap of 3.4~4.0 eV, and excellent chemical stability, making it a very important candidate as a material for bipolar devices. P-type conductivity in Transparent Conductive Oxides (TCO) is controlled by the oxygen vacancy concentration. During the TCO film deposition process, additional oxygen diffusing into the NiO structure causes the formation of Ni 3p ions and Ni vacancies. This eventually affects the hole concentration of the p-type oxide thin film. In this work, the surface morphology and the electrical characteristics were confirmed in accordance with the annealing atmosphere of the nickel oxide thin film.

Electrical Characterization of Lateral NiO/Ga2O3 FETs with Heterojunction Gate Structure (이종접합 Gate 구조를 갖는 수평형 NiO/Ga2O3 FET의 전기적 특성 연구)

  • Geon-Hee Lee;Soo-Young Moon;Hyung-Jin Lee;Myeong-Cheol Shin;Ye-Jin Kim;Ga-Yeon Jeon;Jong-Min Oh;Weon-Ho Shin;Min-Kyung Kim;Cheol-Hwan Park;Sang-Mo Koo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.36 no.4
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    • pp.413-417
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    • 2023
  • Gallium Oxide (Ga2O3) is preferred as a material for next generation power semiconductors. The Ga2O3 should solve the disadvantages of low thermal resistance characteristics and difficulty in forming an inversion layer through p-type ion implantation. However, Ga2O3 is difficult to inject p-type ions, so it is being studied in a heterojunction structure using p-type oxides, such as NiO, SnO, and Cu2O. Research the lateral-type FET structure of NiO/Ga2O3 heterojunction under the Gate contact using the Sentaurus TCAD simulation. At this time, the VG-ID and VD-ID curves were identified by the thickness of the Epi-region (channel) and the doping concentration of NiO of 1×1017 to 1×1019 cm-3. The increase in Epi region thickness has a lower threshold voltage from -4.4 V to -9.3 V at ID = 1×10-8 mA/mm, as current does not flow only when the depletion of the PN junction extends to the Epi/Sub interface. As an increase of NiO doping concentration, increases the depletion area in Ga2O3 region and a high electric field distribution on PN junction, and thus the breakdown voltage increases from 512 V to 636 V at ID =1×10-3 A/mm.

반도체 재료의 구조분석을 위한 전자선 회절패턴 형성의 연구

  • Baek, Mun-Cheol
    • ETRI Journal
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    • v.11 no.1
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    • pp.3-19
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    • 1989
  • 반도체 재료의 결정구조를 분석하기 위하여 사용되는 전자현미경의 전자선 회절패턴 형성에 대하여 연구하였다. 결정질 재료의 회절현상을 논의하기 위해 역격자이론에 대하여 간단히 살펴보고 X선과 전자선 회절패턴의 차이점 등을 고찰하였다. 파동역학에 기초한 회절물리학의 운동학 이론(kinematic theory)을 기본으로 하여 실리콘 결정에 대한 구조인자(structure factor) 및 형태인자(shape factor)를 계산하고 회절패턴으로부터 면지수를 결정하는 과정을 논의하였다. Basic program을 구성하여 전자현미경의 입력 data로부터 해당 회절패턴을 형성하도록 하였으며 이 결과는 실제의 패턴과 일치하였다. 이 program은 추후 전자현미경의 컴퓨터 시뮬레이션을 위하여 중요하게 이용될 수 있을 것으로 판단되었다.

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