• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.105-113
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• 2013

In this paper a micro solar energy harvesting system with MPPT(Maximum Power Point Tracking) control using a miniature PV(photovoltaic) cell of which the output is less than 0.5V is proposed. The MPPT control is implemented using linear relationship between the open-circuit voltage of a PV cell and its MPP(Maximum Power Point) voltage such that a pilot PV cell can track the MPP of the main PV cell in real time. The proposed circuit is designed in 0.18um CMOS process. The designed chip area is $900um{\times}1370um$ including a load charge pump and pads. Measured results show that the designed system can track the MPP voltage changes with variations of light intensity. The designed circuit with MPPT control delivers MPP voltages to load even though the load is heavy such that it can supply more power when the MPPT control is applied. The proposed circuit does not require any precharged battery resulting in more suitability for miniaturized self-powered systems compared to the existing works.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.12
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• pp.1008-1015
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• 2002

The fabricated La-modified lead titanate (PLT) thin film without poling treatment was investigated for modulation frequency dependence of pyroelectric properties by the dynamic method. $Pb_{l-x}La_{x}Ti_{l-x/4}O_3$(x=0.1) (PLT(10)) thin film haying 10 mol% La content was deposited on a Pt/$TiO_{x}$/$SiO_2$/Si substrate by sol-gel method. The PLT(10) thin film exhibits a relatively excellent dielectric property. The pyroelectric coefficient (p) of the PLT(10) thin film is 6.6 x $10^{-9}C$$textrm{cm}^2$$.$K without frequency dependence. The figure of merits for the voltage responsivity and specific detectivity are 1.03 x $10^{-11}C$.cm/J and 1.46 x $10^{-10}C$.cm/J, respectively The PLT(10) thin film has voltage responsivity (RV) of 5.IS V/W at 8 Hz. Noise equivalent power (NEP) and specific detectivity ($D^{*}$) of the PLT(10) thin film are 9.93 x $10^{-8}$W/$Hz^{1/2}$ and 1.81 x $10^{6}$cm.$Hz^{1/2}$/W at the same frequency of 100 Hz,, respectively The results means that PLT thin film having 10 mol% La content is suitable for the sensing materials of pyroelectric IR sensors.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.4 s.346
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• pp.8-15
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• 2006

In this paper, the 94 GHz, low conversion loss, and high isolation single balanced mixer is designed and fabricated using GaAs-based metamorphic high electron mobility transistors (MHEMTs) with 70 nm gate length and the hybrid ring coupler with the micromachined transmission lines, dielectric-supported air-gapped microstrip lines (DAMLs). The 70 nm MHEMT devices exhibit DC characteristics with a drain current density of 607 mA/mm an extrinsic transconductance of 1015 mS/mm. The current gain cutoff frequency ($f_T$) and maximum oscillation frequency ($f_{max}$) are 320 GHz and 430 GHz, respectively. The fabricated hybrid ring coupler shows wideband characteristics of the coupling loss of $3.57{\pm}0.22dB$ and the transmission loss of $3.80{\pm}0.08dB$ in the measured frequency range of 85 GHz to 105 GHz. This mixer shows that the conversion loss and isolation characteristics are $2.5dB{\sim}>2.8dB$ and under -30 dB, respectively, in the range of $93.65GHz{\sim}94.25GHz$. At the center frequency of 94 GHz, this mixer shows the minimum conversion loss of 2.5 dB at a LO power of 6 dBm To our knowledge, these results are the best performances demonstrated from 94 GHz single balanced mixer utilizing GaAs-based HEMTs in terms of conversion loss as well as isolation characteristics.

• Proceedings of the Korean Nuclear Society Conference
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• 1996.05b
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• pp.141-147
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• 1996

1979년 3월 Three Mile Island 2 (TMI-2) 발전소에서 사고가 발생했을 때 원자로용기내에 생성된 수소기체로 인하여 운전원은 원자로용기의 수위를 정확히 측정할 수 없었으며, 이로 인하여 사고상태를 신속히 파악하지 못하였다. TMI 사고이후 미국 원자력규제위원회 NRC는 이 같은 문제점을 해결하고자 미국내 모든 원전에서 사고 또는 비정상 조건이 발생할 경우에 원자로 용기 수위에 대하여 운전원이 신뢰성을 갖을 수 있는 후속조치를 수행토록 요구하였다. 또한 미국의 대표적인 전력연구소인 EFRI에서는 개량형 경수로 (Advanced Light Water Reactor : ALWR) 설계 요건으로 이러한 설계가 반영되도록 요건화 하였다.［1］. 본 논문에서는 2,825 MWt급 한국형 표준원전을 대상으로 EPRI에서 요구한 설계요건에 따라 TMI 2 발전소에서와 같은 사고로 인하여 수소기체가 발생했을 경우와 발전소가 비정상 상태로 인하여 증기가 발생했을 경우에, 이를 신속히 제거하여 운전원이 원자로용기의 수위를 정확히 감지할 수 있도록 하는 설계 방안을 검토하였다. 따라서, 설계방안으로 원자로용기에 모인 증기 또는 수소기체를 계통중 가장 높은 위치에 있으며, 계통구성 기기중 유일하게 2상을 유지하고 있는 가압기로 배출시키고자 두 기기간에 연결관을 설치하는 방안에 대해서 분석하였다. 원자로용기 상부해드와 가압기를 연결하는 방안은 여러가지가 있으나, 검토한 결과 한국형 표준원전에서는 연결관을 가압기 상부해드보다 4m 높게하여 원자로용기 상부해드와 연결하는 방안이 EPRI의 설계요건을 만족하면서 기존설계에 영향을 가장 적게 미치는 적합한 설계방안으로 분석되었다.크다는 단점이 있다.TEX>$_2$O$_3$ 흡착제 제조시 TiO$_2$ 함량에 따른 Co$^{2＋}$ 흡착량과 25$0^{\circ}C$의 고온에서 ZrO$_2$와 $Al_2$O$_3$의 표면에 생성된 코발트 화합물을 XPS와 EPMA로 부터 확인하였다.인을 명시적으로 설명할 수 있다. 둘째, 오류의 시발점을 정확히 포착하여 동기가 분명한 수정대책을 강구할 수 있다. 셋째, 음운 과 정의 분석 모델은 새로운 언어 학습시에 관련된 언어 상호간의 구조적 마찰을 설명해 줄 수 있다. 넷째, 불규칙적이며 종잡기 힘들고 단편적인 것으로만 보이던 중간언어도 일정한 체계 속에서 변화한다는 사실을 알 수 있다. 다섯째, 종전의 오류 분석에서는 지나치게 모국어의 영향만 강조하고 다른 요인들에 대해서는 다분히 추상적인 언급으로 끝났지만 이 분석을 통 해서 배경어, 목표어, 특히 중간규칙의 역할이 괄목할 만한 것임을 가시적으로 관찰할 수 있 다. 이와 같은 오류분석 방법은 학습자의 모국어 및 관련 외국어의 음운규칙만 알면 어느 학습대상 외국어에라도 적용할 수 있는 보편성을 지니는 것으로 사료된다.없다. 그렇다면 겹의문사를 [-wh]의리를 지 닌 의문사의 병렬로 분석할 수 없다. 예를 들어 누구누구를 [주구-이-ν가] [누구누구-이- ν가]로부터 생성되었다고 볼 수 없다. 그러므로 [-wh] 겹의문사는 복수 의미를 지닐 수 없 다. 그러면 단수 의미는 어떻게 생성되는가\ulcorner 본 논문에서는 표면적 형태에도 불구하고

• Science of Emotion and Sensibility
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• v.13 no.4
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• pp.721-732
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• 2010

As increasing of electrical device usage, social concerns about the possible effects of 60Hz electromagnetic fields (EMF) on human health have increased. The number of people with self-attributed electromagnetic hypersensitivity (EHS) who complain of subjective symptoms such as headache, insomnia etc. also increased. However, we don't know whether the EHS results from psychological factor or real perception to the electromagnetic field. In this study, we simultaneously investigated physiological changes(heart rate, respiration rate, heart rate variability, alpha and beta waves in EEG), subjective symptoms and perception accuracy to assess origins of subjective symptoms according to the EMF exposure. Experiment consists of real and sham sessions and 60Hz 12.5uT magnetic field was on(real) or off(sham) to 15 EHS and 16 nonEHS. As the results, EMF exposure did not have any effects on physiological parameters or subjective symptoms for both groups. There was also no evidence that EHS group perceived the EMFs correctly than the control group. Therefore, the origins of subjective symptoms is not the 60Hz magnetic field but psychological factors.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.11
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• pp.63-70
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• 2001

We demonstrate the MMIC (monolithic microwave integrated circuit) frequency doublers generating stable and low-cost 29 GHz local oscillator signals from 14.5 GHz input signals. These devices were designed and fabricated by using the M MIC integration process of $0.1\;{\mu}m$ gate-length PHEMTs (pseudomorphic high electron mobility transistors) and passive components. The measurements showed S11 or -9.2 dB at 145 GHz, S22 of -18.6 dG at 29 GHz and a minimum conversion loss of 18.2 dB at 14.5 GHz with an input power or 6 dBm. Fundamental signal of 14.5 GHz were suppressed below 15.2 dBe compared to the second harmonic signal at the output port, and the isolation characteristics of fundamental signal between the input and the output port were maintained above :i0 dB in the frequency range 10.5 GHz to 18.5 GHz. The chip size of the fabricated MMIC frequency doubler is $1.5{\times}2.2\;mm^2$.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.9
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• pp.54-62
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• 2015

Although NAND flash-based SSD (Solid-State Drive) provides superior performance in comparison to HDD (Hard Disk Drive), it has a major drawback in write endurance. As a result, the lifetime of SSD is determined by the workload and thus it becomes a big challenge in current technology trend of such as the shifting from SLC (Single Level Cell) to MLC (Multi Level cell) and even TLC (Triple Level Cell). Most previous studies have dealt with wear-leveling or improving SSD lifetime regarding hardware architecture. In this paper, we propose the optimal configuration of host I/O stack focusing on file system, I/O scheduler, and link power management using JEDEC enterprise workloads in terms of WAF (Write Amplification Factor) which represents the efficiency perspective of SSD life time especially for host write processing into flash memory. Experimental analysis shows that the optimum configuration of I/O stack for the perspective of SSD lifetime is MinPower-Dead-XFS which prolongs the lifetime of SSD approximately 2.6 times in comparison with MaxPower-Cfq-Ext4, the best performance combination. Though the performance was reduced by 13%, this contributions demonstrates a considerable aspect of SSD lifetime in relation to I/O stack optimization.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.74-85
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• 2015

PCI Express is a well-known and widely used de-facto system bus standard for connecting among a processor and IO devices. PCI Express is originated from old PCI standard, and its most of applications are limited to be used within a PC or server system. But, because of its fast speed, low power consumption, and good protocol efficiency, it is considered as one of a good candidate for an alternate system interconnect for many years. In this paper, we present design, implementation and early evaluation of an alternate system interconnect by utilizing PCI Express. The developed alternate system interconnect using PCI Express (named PCIeLINK) utilizes non-transparent bridging (NTB) technic which generally used in fail-over system in PCI and PCI Express. By using NTB technic, PCI Express device can be extended to outside of a system without electrical and logical problems arising during system boot and enumeration. To build up an alternate system interconnect, we designed and implemented a network interface card having multiple PCI Express ${\times}4$ connections (theoretically 20 Gbps) and tested, The early test results revealed that an ${\times}4$ port in the card showed 8.6 Gbps peak performance for bulk transmission and 5.1 Gbps peak for normal TCP/IP transfer.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.1
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• pp.74-84
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• 2007

This paper presents a new dual-loop Delay Locked Loop(DLL) to expand the delay lock range of a conventional DLL. The proposed dual-loop DLL contains a Coarse_loop and a Fine_loop, and its operation utilizes one of the loops selected by comparing the initial time-difference among the reference clock and 2 internal clocks. The 2 internal clock signals are taken, respectively, at the midpoint and endpoint of a VCDL and thus are $180^{\circ}$ separated in phase. When the proposed DLL is out of the conventional lock range, the Coarse_loop is selected to push the DLL in the conventional lock range and then the Fine_loop is used to complete the locking process. Therefore, the proposed DLL is always stably locked in unless it is harmonically false-locked. Since the VCDL employed in the proposed DLL needs two control voltages to adjust the delay time, it uses TG-based inverters, instead of conventional, multi-stacked, current-starved inverters, to compose the delay line. The new VCDL provides a wider delay range than a conventional VCDL In overall, the proposed DLL demonstrates a more than 2 times wider lock range than a conventional DLL. The proposed DLL circuits have been designed, simulated and proved using 0.18um, 1.8V TSMC CMOS library and its operation frequency range is 100MHz${\sim}$1GHz. Finally, the maximum phase error of the DLL locked in at 1GHz is less than 11.2ps showing a high resolution and the simulated power consumption is 11.5mW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.21-27
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• 2008

This paper describes a CMOS 16:1 binary-tree multiplexer(MUX) using $0.18-{\mu}m$ technology. To provide immunity for wide frequency range and process-and-temperature variations, the MUX adopts several delay compensation techniques. Simulation results show that the proposed MUX maintains the setup margins and hold margins close to the optimal value, i.e., 0.5UI, in wide frequency-range and in wide process-and-temperature variations, with standard deviation of 0.05UI approximately. These results represent that these proposed delay compensations are effective and the reliability is much improved although CMOS logic circuits are sensitive to those variations. The MUX is fabricated using $0.18-{\mu}m$ CMOS process, and tested with a test board. At power supply voltage of 1.8-V, maximum data-rate and area of the MUX is 1.65-Gb/s and 0.858 $mm^2$, respectively. The MUX dissipates a power of 24.12 mW, and output eye opening is 272.53 mV, 266.55 ps at 1.65-Gb/s operation.